EP20K200EBC652-3 vs EP20K200EBC652-3N Vergleich
Detaillierter Direktvergleich von EP20K200EBC652-3 von Intel und EP20K200EBC652-3N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K200EBC652-3 | EP20K200EBC652-3N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $210,00 | $220,00 |
| Family | APEX-20KE | — |
| Logic Elements (LEs) | 8,320 | — |
| Logic Array Blocks (LABs) | 832 | 832 |
| Total RAM Bits | 106,496 | — |
| Maximum User I/O Pins | 376 | — |
| Embedded System Blocks (ESBs) | Yes (dual-port RAM / ROM / CAM) | — |
| PLLs | 4 | — |
| Gehäuse | 652-ball FineLine BGA (top-side, 1.27 mm pitch) | 652-ball BGA |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0C to +85C (EBC - Enhanced Commercial) | — |
| Speed Grade | -3 | -3 (slowest in APEX 20KE family) |
| Configuration Mode | JTAG / PS / Passive-serial / Passive-parallel | — |
| Process Node | [DATA_NEEDED: process node] | — |
| Core Voltage | [DATA_NEEDED: core voltage] | — |
| RoHS-Status | Not RoHS (non-lead-free variant) | Compliant |
| Lebenszyklusstatus | Obsolete - last time-buy period closed | — |
| Series | — | APEX 20KE (APEX-20KE®) |
| Device Family | — | EP20K200 |
| System Gates | — | 200,000 |
| Logic Elements / Cells | — | 8,320 |
| Macrocells | — | 832 |
| Embedded RAM | — | 106,496 bits |
| User I/Os (DigiKey listing) | — | 376 |
| User I/Os (digchip listing) | — | 277 |
| Propagation Delay | — | 2.33 ns |
| Internal Frequency (max) | — | 189 MHz |
| Process Technology | — | 0.22 µm CMOS |
| Core Supply Voltage | — | 1.71 V to 1.89 V (nominal 1.8 V) |
| I/O Supply (LVDS-capable) | — | LVDS, 2.5 V referenced (per source variant) |
| Operating Temperature (TJ) | — | 0 °C to 85 °C (commercial) |
| Configuration | — | JTAG (IEEE 1149.1), Passive Serial |