EP20K200FC484-1N vs EP20K200EFC484-1 Vergleich
Detaillierter Direktvergleich von EP20K200FC484-1N von Altera und EP20K200EFC484-1 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP20K200EFC484-1 - APEX 20KE FPGA 200K Gates 484-BGA | Altera
EP20K200EFC484-1 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP20K200FC484-1N | EP20K200EFC484-1 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $118,00 | $68,40 |
| Family | APEX 20K | APEX 20KE |
| Series | APEX-20K® | — |
| Logic Elements / Cells | 8,320 | 8320 |
| System Gates | 200,000 (approx.) | 200000 |
| Maximum User I/O | 382 | 376 |
| Number of Macros | 832 | — |
| Supply Voltage (Core) | 2.5 V (2.375 V – 2.625 V) | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Propagation Delay | 2.5 ns | — |
| Maximum Internal Frequency | 250 MHz | — |
| Betriebstemperatur | 0 °C to +85 °C | -40 °C to +85 °C (industrial, inferred from grade code) |
| Gehäuse | 484-FBGA (23 x 23 mm) | 484-BGA (FineLine BGA) |
| Package Code | BGA / FBGA | — |
| Number of Pins/balls | 484 | — |
| Montageart | Surface Mount | Surface Mount |
| Lead-Free / RoHS | Compliant (per distributor listings) | — |
| Architecture | MultiCore (LUT + product-term + embedded memory) | — |
| Configuration Method | SRAM-based, JTAG/ByteBlaster | — |
| Embedded Memory (Bits) | — | 106496 |
| Number of PLLs | — | 4 |
| Core Voltage | — | 1.8 V |
| Package Ball Count | — | 484 |
| I/O Standard Support | — | LVDS, PCI, LVTTL, LVCMOS, SSTL, HSTL |
| Programming Interface | — | IEEE 1149.1 JTAG, passive serial, passive parallel |
| RoHS-Status | — | [DATA_NEEDED: RoHS compliance status] |
| MSL-Level | — | [DATA_NEEDED: MSL moisture sensitivity level] |