EP20K200FC484-1N vs EP20K200EFC484-1 对比

详细并排对比 EP20K200FC484-1N 出自 Altera 和 EP20K200EFC484-1 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP20K200EFC484-1 EP20K200EFC484-1 - APEX 20KE FPGA 200K Gates 484-BGA | Altera

EP20K200EFC484-1 - APEX 20KE FPGA 200K Gates 484-BGA | Altera

EP20K200EFC484-1 ⚠ 最后一次采购

规格对比

参数 EP20K200FC484-1N EP20K200EFC484-1
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 最后采购期
库存状态 有库存 有库存
单价(USD) $118.00 $68.40
Family APEX 20K APEX 20KE
Series APEX-20K® —
Logic Elements / Cells 8,320 8320
System Gates 200,000 (approx.) 200000
Maximum User I/O 382 376
Number of Macros 832 —
Supply Voltage (Core) 2.5 V (2.375 V – 2.625 V) —
Process Technology 0.22 µm CMOS 0.22 µm CMOS
Propagation Delay 2.5 ns —
Maximum Internal Frequency 250 MHz —
工作温度 0 °C to +85 °C -40 °C to +85 °C (industrial, inferred from grade code)
封装 484-FBGA (23 x 23 mm) 484-BGA (FineLine BGA)
Package Code BGA / FBGA —
Number of Pins/balls 484 —
安装类型 Surface Mount Surface Mount
Lead-Free / RoHS Compliant (per distributor listings) —
Architecture MultiCore (LUT + product-term + embedded memory) —
Configuration Method SRAM-based, JTAG/ByteBlaster —
Embedded Memory (Bits) — 106496
Number of PLLs — 4
Core Voltage — 1.8 V
Package Ball Count — 484
I/O Standard Support — LVDS, PCI, LVTTL, LVCMOS, SSTL, HSTL
Programming Interface — IEEE 1149.1 JTAG, passive serial, passive parallel
RoHS 状态 — [DATA_NEEDED: RoHS compliance status]
MSL 等级 — [DATA_NEEDED: MSL moisture sensitivity level]

数据手册与资源

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