EP20K300EBC652-2 vs EP20K300EBC652-1 Vergleich
Detaillierter Direktvergleich von EP20K300EBC652-2 von Altera und EP20K300EBC652-1 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP20K300EBC652-1 - APEX 20KE 300K Gates FPGA, 652-BGA | Altera
EP20K300EBC652-1 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP20K300EBC652-2 | EP20K300EBC652-1 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Unknown | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $384,08 | $215,00 |
| Product Type | Field Programmable Gate Array (FPGA) | — |
| Device Family | APEX-20KE | — |
| Logic Cells | 11520 | — |
| Macros | 1152 | — |
| Total RAM Bits | 147456 bits | 147456 |
| I/O Count | 408 | — |
| Versorgungsspannung | 1.71 V to 1.89 V | — |
| Gehäuse | 652-BGA | — |
| Package Dimensions | 45 mm x 45 mm | — |
| Technology | 0.22 um (reported for family variant) | — |
| Maximale Taktfrequenz | 350 MHz (reported for family variant) | — |
| Configuration Technology | SRAM-based programmable logic (family description) | — |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | 0C to +85C (industrial range varies) |
| RoHS-Status | unknown | unknown |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Family | — | APEX 20KE |
| Series | — | APEX-20KE® |
| Number of Logic Elements / Cells | — | 11520 |
| Number of Gates | — | 300000 |
| Number of I/O | — | 408 |
| Voltage - Supply | — | 1.71 V to 1.89 V |
| Gehäuse / Bauform | — | 652-BGA (45x45 mm) |
| Supplier Device Package | — | 652-BGA |
| Process Technology | — | 0.22 µm CMOS |
| Core Operating Frequency (max) | — | [DATA_NEEDED: confirm from datasheet typical perf] |
| LVDS Support | — | Yes (per APEX 20KE family specification) |
| In-System Programmable | — | Yes (JTAG via ByteBlasterMV/MasterBlaster) |