EP20K300EBC652-2 vs EP20K300EBC652-1 Comparación
Comparación detallada lado a lado de EP20K300EBC652-2 por Altera y EP20K300EBC652-1 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EP20K300EBC652-1 - APEX 20KE 300K Gates FPGA, 652-BGA | Altera
EP20K300EBC652-1 ⚠ Última compraComparación de especificaciones
| Parámetro | EP20K300EBC652-2 | EP20K300EBC652-1 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Unknown | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $384,08 | $215,00 |
| Product Type | Field Programmable Gate Array (FPGA) | — |
| Device Family | APEX-20KE | — |
| Logic Cells | 11520 | — |
| Macros | 1152 | — |
| Total RAM Bits | 147456 bits | 147456 |
| I/O Count | 408 | — |
| Tensión de alimentación | 1.71 V to 1.89 V | — |
| Encapsulado | 652-BGA | — |
| Package Dimensions | 45 mm x 45 mm | — |
| Technology | 0.22 um (reported for family variant) | — |
| Frecuencia de reloj máxima | 350 MHz (reported for family variant) | — |
| Configuration Technology | SRAM-based programmable logic (family description) | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | 0C to +85C (industrial range varies) |
| Estado RoHS | unknown | unknown |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Family | — | APEX 20KE |
| Series | — | APEX-20KE® |
| Number of Logic Elements / Cells | — | 11520 |
| Number of Gates | — | 300000 |
| Number of I/O | — | 408 |
| Voltage - Supply | — | 1.71 V to 1.89 V |
| Encapsulado / Carcasa | — | 652-BGA (45x45 mm) |
| Supplier Device Package | — | 652-BGA |
| Process Technology | — | 0.22 µm CMOS |
| Core Operating Frequency (max) | — | [DATA_NEEDED: confirm from datasheet typical perf] |
| LVDS Support | — | Yes (per APEX 20KE family specification) |
| In-System Programmable | — | Yes (JTAG via ByteBlasterMV/MasterBlaster) |