EP20K30EFC144-3N vs EP20K30EFC144-2X Vergleich

Detaillierter Direktvergleich von EP20K30EFC144-3N von Altera und EP20K30EFC144-2X von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Altera
EP20K30EFC144-2X EP20K30EFC144-2X - 30K Gate APEX 20K FPGA | Altera

EP20K30EFC144-2X - 30K Gate APEX 20K FPGA | Altera

EP20K30EFC144-2X Obsolete

Spezifikationsvergleich

Parameter EP20K30EFC144-3N EP20K30EFC144-2X
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $64,00 $58,50
Family APEX 20K —
Typical Gates 30,000 30,000 gates
Logic Elements (Cells) 1,200 —
Embedded Memory (RAM bits) 24,576 —
User I/Os 408 —
Pin-Anzahl 144 —
Package Type 144-LBGA (FineLine BGA) —
Speed Grade -3 -2X
Internal Frequency (max) 160 MHz —
Propagation Delay (typical) 1.68 ns —
Process Technology 0.22 µm CMOS 0.22 um
Core Supply Voltage 1.8 V 1.8 V
Betriebstemperatur 0 °C to 85 °C (commercial) —
Architecture MultiCore (LUT + product-term + ESB) —
Configuration Memory SRAM (volatile, requires boot PROM) —
Montageart Surface Mount Surface Mount
RoHS-Status unknown unknown
Device Family — Altera APEX 20K
Device Type — Loadable programmable logic device (FPGA/CPLD hybrid)
Number of Logic Elements / Cells — 1,200 cells (third-party parametric listing)
Number of Macrocells — 192
Number of User I/O — 93
Number of Terminals — 144
Terminal Form — Ball
Package Code — LBGA / 144-FBGA
Package Shape — Square
Betriebstemperaturbereich — [DATA_NEEDED: exact operating temperature range]
Embedded RAM Bits — [DATA_NEEDED: embedded memory size]
Supported I/O Standards — [DATA_NEEDED: supported I/O standards]
Configuration Schemes — [DATA_NEEDED: supported configuration schemes]

Datenblätter & Ressourcen

Alle Produkte durchsuchen BOM erstellen Angebot anfordern