EP20K30EFC324-2X vs EP20K100EFC324-2X Vergleich
Detaillierter Direktvergleich von EP20K30EFC324-2X von Altera und EP20K100EFC324-2X von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K30EFC324-2X | EP20K100EFC324-2X |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $21,00 | $99,50 |
| Series | APEX-20KE | — |
| Family | APEX-20KE (1.8V, LVDS) | APEX 20KE |
| Manufacturer | Altera (Intel) | — |
| Device Type | FPGA (Field Programmable Gate Array) | SPLD / FPGA (Field Programmable Gate Array) |
| Typical Gates | 30,000 | — |
| Logic Elements | 1,200 | — |
| Total RAM Bits | 24,576 | 53,248 bits |
| Maximum User I/O | 128 | — |
| Pin-to-Pin Delay | 2.69 ns | — |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Process Technology | 0.22 micrometer | 0.22 µm CMOS (all-layer copper metal) |
| Gehäuse / Bauform | 324-BGA (FineLine) | — |
| Supplier Device Package | 324-FBGA (19x19 mm) | — |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0C to 85C [DATA_NEEDED: full industrial range] | 0 °C to 85 °C (Commercial) |
| I/O Standard Support | LVDS, LVTTL, LVCMOS, PCI | — |
| PLL Count | 4 | — |
| Speed Grade | -2X | -2X |
| Configuration Method | Serial / Parallel PROM or flash | — |
| System Gates | — | 100,000 gates |
| Logic Elements / Cells | — | 4,160 |
| LABs / CLBs | — | 416 |
| Maximum User I/Os | — | 246 |
| Number of I/O Banks | — | 8 (per APEX 20KE family) |
| Propagation Delay | — | 1.6 ns |
| Internal Operating Frequency | — | Up to 250 MHz |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Supply Voltage (VCCIO) | — | MultiVolt: 1.8 V / 2.5 V / 3.3 V |
| Gehäuse | — | 324-ball FBGA (FineLine BGA), 19x19 mm, 1.27 mm pitch |
| Programming Interface | — | IEEE 1149.1 JTAG |
| Configuration Modes | — | Passive Serial, Passive Parallel, JTAG, Altera configuration EPROM |
| RoHS-Status | — | [DATA_NEEDED: confirm against lot-specific documentation] |