EP20K30EFC324-2X vs EP20K100EFC324-2X 对比

详细并排对比 EP20K30EFC324-2X 出自 Altera 和 EP20K100EFC324-2X 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K30EFC324-2X EP20K100EFC324-2X
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $21.00 $99.50
Series APEX-20KE —
Family APEX-20KE (1.8V, LVDS) APEX 20KE
Manufacturer Altera (Intel) —
Device Type FPGA (Field Programmable Gate Array) SPLD / FPGA (Field Programmable Gate Array)
Typical Gates 30,000 —
Logic Elements 1,200 —
Total RAM Bits 24,576 53,248 bits
Maximum User I/O 128 —
Pin-to-Pin Delay 2.69 ns —
Core Supply Voltage 1.71 V to 1.89 V (1.8 V nominal) —
Process Technology 0.22 micrometer 0.22 µm CMOS (all-layer copper metal)
封装 / 外壳 324-BGA (FineLine) —
Supplier Device Package 324-FBGA (19x19 mm) —
安装类型 Surface Mount Surface Mount
工作温度 0C to 85C [DATA_NEEDED: full industrial range] 0 °C to 85 °C (Commercial)
I/O Standard Support LVDS, LVTTL, LVCMOS, PCI —
PLL Count 4 —
Speed Grade -2X -2X
Configuration Method Serial / Parallel PROM or flash —
System Gates — 100,000 gates
Logic Elements / Cells — 4,160
LABs / CLBs — 416
Maximum User I/Os — 246
Number of I/O Banks — 8 (per APEX 20KE family)
Propagation Delay — 1.6 ns
Internal Operating Frequency — Up to 250 MHz
Core Supply Voltage (VCCINT) — 1.8 V
I/O Supply Voltage (VCCIO) — MultiVolt: 1.8 V / 2.5 V / 3.3 V
封装 — 324-ball FBGA (FineLine BGA), 19x19 mm, 1.27 mm pitch
Programming Interface — IEEE 1149.1 JTAG
Configuration Modes — Passive Serial, Passive Parallel, JTAG, Altera configuration EPROM
RoHS 状态 — [DATA_NEEDED: confirm against lot-specific documentation]

数据手册与资源

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