EP20K400CB652I7 vs EP20K400CB652C9N Vergleich
Detaillierter Direktvergleich von EP20K400CB652I7 von Altera und EP20K400CB652C9N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K400CB652I7 | EP20K400CB652C9N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $149,50 | $195,00 |
| Family | APEX 20KC | APEX 20KC |
| Device Family | Field-Programmable Gate Array (FPGA) | — |
| Typical Gates | 400,000 | — |
| Logic Elements (LEs) | 16,640 | — |
| Maximum Operating Frequency | 375.94 MHz | — |
| Process Technology | 0.15 µm CMOS | — |
| Core Supply Voltage | 1.8 V | — |
| I/O Supply Voltage | 1.8 V / 3.3 V | — |
| Gehäuse | BGA-652 (652-ball) | BGA-652 (Plastic Ball Grid Array, 652 balls) |
| Package Code (JESD-30) | S-PBGA-B652 | — |
| Terminal Form | Ball | — |
| Package Shape | Square | — |
| Maximum User I/O Pins | [DATA_NEEDED: max user I/O] | — |
| Embedded Memory | Embedded System Blocks (ESB) - dual-port RAM / FIFO / CAM | — |
| Configuration Method | SRAM + JTAG (ISP) | — |
| Speed Grade | 7 | — |
| Temperature Grade | Industrial (-40 °C to +100 °C) | — |
| RoHS-Status | Non-compliant (JESD-609 e0, contains lead) | Unknown (legacy Altera part - verify with distributor) |
| Manufacturer Status | Obsolete (Intel/Altera legacy FPGA) | — |
| Series | — | EP20K400 |
| Device Type | — | Programmable Logic Device (SOPC FPGA) |
| Architecture | — | MultiCore (LUT logic + Embedded System Blocks) |
| System Gates | — | 400,000 |
| Logic Elements | — | 16,640 |
| Maximum User I/Os | — | 502 |
| Total Memory Bits | — | 212,992 (per chip) |
| Maximum Internal Frequency | — | 250 MHz |
| Propagation Delay | — | 2.0 ns |
| Logic Family | — | CMOS |
| Core Process Technology | — | 0.15 µm all-layer copper CMOS |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Supply Voltage (VCCIO) | — | 2.5 V |
| Betriebstemperaturbereich | — | 0 °C to +85 °C (Commercial) |
| Montageart | — | Surface Mount |
| Configuration Interface | — | IEEE 1149.1 JTAG, serial passive parallel async |