EP20K400CF672C-7ES vs EP20K600CF672C-7ES Vergleich

Detaillierter Direktvergleich von EP20K400CF672C-7ES von Altera und EP20K600CF672C-7ES von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP20K400CF672C-7ES EP20K600CF672C-7ES
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $132,00 $2.050,00
Family APEX 20KC APEX 20KC
Series EP20K400 —
System Gates 400,000 —
Logic Elements 16,640 —
Embedded Memory (bits) 212,992 —
Maximum User I/O 488 488
Number of PLLs 4 —
Embedded Array Blocks (EABs) [DATA_NEEDED: EAB count from datasheet] —
Process Technology 0.15 um CMOS 0.15 micron all-layer copper CMOS
Core Voltage 1.8 V 1.8 V (typical APEX 20KC, exact value per datasheet)
Speed Grade -7 -7
Maximum Internal Clock Frequency 375.94 MHz —
Propagation Delay (per Sierra IC) 1.400 ns —
Betriebstemperaturbereich 0 C to 85 C (commercial) —
Gehäuse 672-BGA (FineLine BGA, 1.00 mm pitch) 672-ball FCBGA (FineLine BGA), 45 x 45 mm, 1.27 mm pitch
Montageart Surface Mount —
RoHS-Status [DATA_NEEDED: RoHS compliance] —
Configuration Support EPC16, EPC8, EPC4, EPC2, EPC1 serial devices; JTAG —
Device Type — Field Programmable Gate Array (FPGA)
Maximum System Gates — 1,560,000 (typical 600K application gates)
Typical Logic Elements — 24,320 (per APEX 20KC 600K family)
Total I/O Lines — 504 (per Microchip USA listing)
Total Inputs — 508
Embedded System Blocks (ESBs) — 248
Embedded RAM — 248 Kbits (dual-port)
PLLs — 4
Propagation Delay — 1.48 ns to 1.6 ns
Maximale Taktfrequenz — 1666.6 MHz
Betriebstemperatur — 0 C to 85 C (Commercial)
Configuration Mode — EPC serial / JTAG IEEE 1149.1
Compliance — RoHS status unknown (verify with manufacturer datasheet)

Datenblätter & Ressourcen

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