EP20K400CF672C-7ES vs EP20K600CF672C-7ES 对比

详细并排对比 EP20K400CF672C-7ES 出自 Altera 和 EP20K600CF672C-7ES 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K400CF672C-7ES EP20K600CF672C-7ES
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $132.00 $2,050.00
Family APEX 20KC APEX 20KC
Series EP20K400 —
System Gates 400,000 —
Logic Elements 16,640 —
Embedded Memory (bits) 212,992 —
Maximum User I/O 488 488
Number of PLLs 4 —
Embedded Array Blocks (EABs) [DATA_NEEDED: EAB count from datasheet] —
Process Technology 0.15 um CMOS 0.15 micron all-layer copper CMOS
Core Voltage 1.8 V 1.8 V (typical APEX 20KC, exact value per datasheet)
Speed Grade -7 -7
Maximum Internal Clock Frequency 375.94 MHz —
Propagation Delay (per Sierra IC) 1.400 ns —
工作温度范围 0 C to 85 C (commercial) —
封装 672-BGA (FineLine BGA, 1.00 mm pitch) 672-ball FCBGA (FineLine BGA), 45 x 45 mm, 1.27 mm pitch
安装类型 Surface Mount —
RoHS 状态 [DATA_NEEDED: RoHS compliance] —
Configuration Support EPC16, EPC8, EPC4, EPC2, EPC1 serial devices; JTAG —
Device Type — Field Programmable Gate Array (FPGA)
Maximum System Gates — 1,560,000 (typical 600K application gates)
Typical Logic Elements — 24,320 (per APEX 20KC 600K family)
Total I/O Lines — 504 (per Microchip USA listing)
Total Inputs — 508
Embedded System Blocks (ESBs) — 248
Embedded RAM — 248 Kbits (dual-port)
PLLs — 4
Propagation Delay — 1.48 ns to 1.6 ns
最大时钟频率 — 1666.6 MHz
工作温度 — 0 C to 85 C (Commercial)
Configuration Mode — EPC serial / JTAG IEEE 1149.1
Compliance — RoHS status unknown (verify with manufacturer datasheet)

数据手册与资源

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