EP20K400CF672C8ES vs EP20K400CF672C8AA Vergleich
Detaillierter Direktvergleich von EP20K400CF672C8ES von Altera und EP20K400CF672C8AA von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K400CF672C8ES | EP20K400CF672C8AA |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $158,40 | $145,00 |
| Family | APEX 20KC | APEX 20K |
| Series | EP20K400 | — |
| Logic Cells / Macros | 16,640 | — |
| System Gates (typical) | 400,000 | — |
| System Gates (maximum) | 212,992 [DATA_NEEDED: confirm datasheet interpretation] | — |
| Maximum User I/O | 488 (per Globalspec) / 484 (per Microchip USA) [DATA_NEEDED: confirm canonical value] | — |
| Bidirectional I/O | 484 | — |
| Propagation Delay | 2.5 ns | [DATA_NEEDED: typical propagation delay] |
| Maximum Internal Frequency | 301.21 MHz | — |
| Process Technology | 0.15 µm CMOS | — |
| Nominal Supply Voltage | 1.8 V | — |
| Supply Voltage Range | 1.71 V to 1.89 V | — |
| Betriebstemperatur | 0°C to 85°C (Commercial) | 0 C to 85 C (Commercial) |
| Gehäuse | 672-BGA FineLine (FC-FBGA / S-PBGA-B672) | — |
| Logic Family | CMOS | — |
| Architecture | MultiCore™ (LUT + Embedded System Block) | — |
| Programming Method | JTAG / in-system via configuration memory | — |
| RoHS-Status | [DATA_NEEDED: not stated in verified data] | [DATA_NEEDED: RoHS status] |
| Number of Logic Elements/Cells | — | 16640 |
| Number of Logic Units (LEs) | — | [DATA_NEEDED: number of LUs] |
| Embedded System Blocks (ESBs) | — | 212 |
| On-chip RAM Bits | — | [DATA_NEEDED: total embedded memory bits] |
| Number of User I/O Pins | — | 488 |
| Package Type | — | 672-ball Fine-Pitch BGA (FBGA) |
| Number of Pins/Balls | — | 672 |
| Supply Voltage (Core) | — | 2.5 V |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, SSTL, HSTL (multi-voltage I/O) |
| Montageart | — | Surface Mount |
| Packaging | — | Tray |
| Feuchtigkeitsempfindlichkeitsgrad (MSL) | — | 3 (168 Hours) |
| Configuration Interface | — | JTAG (IEEE 1149.1), passive serial, passive parallel asynchronous |