EP20K400CF672C8ES vs EP20K400CF672C8AA 对比

详细并排对比 EP20K400CF672C8ES 出自 Altera 和 EP20K400CF672C8AA 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K400CF672C8ES EP20K400CF672C8AA
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $158.40 $145.00
Family APEX 20KC APEX 20K
Series EP20K400 —
Logic Cells / Macros 16,640 —
System Gates (typical) 400,000 —
System Gates (maximum) 212,992 [DATA_NEEDED: confirm datasheet interpretation] —
Maximum User I/O 488 (per Globalspec) / 484 (per Microchip USA) [DATA_NEEDED: confirm canonical value] —
Bidirectional I/O 484 —
Propagation Delay 2.5 ns [DATA_NEEDED: typical propagation delay]
Maximum Internal Frequency 301.21 MHz —
Process Technology 0.15 µm CMOS —
Nominal Supply Voltage 1.8 V —
Supply Voltage Range 1.71 V to 1.89 V —
工作温度 0°C to 85°C (Commercial) 0 C to 85 C (Commercial)
封装 672-BGA FineLine (FC-FBGA / S-PBGA-B672) —
Logic Family CMOS —
Architecture MultiCore™ (LUT + Embedded System Block) —
Programming Method JTAG / in-system via configuration memory —
RoHS 状态 [DATA_NEEDED: not stated in verified data] [DATA_NEEDED: RoHS status]
Number of Logic Elements/Cells — 16640
Number of Logic Units (LEs) — [DATA_NEEDED: number of LUs]
Embedded System Blocks (ESBs) — 212
On-chip RAM Bits — [DATA_NEEDED: total embedded memory bits]
Number of User I/O Pins — 488
Package Type — 672-ball Fine-Pitch BGA (FBGA)
Number of Pins/Balls — 672
Supply Voltage (Core) — 2.5 V
I/O Standards Supported — LVTTL, LVCMOS, PCI, SSTL, HSTL (multi-voltage I/O)
安装类型 — Surface Mount
Packaging — Tray
湿敏等级(MSL) — 3 (168 Hours)
Configuration Interface — JTAG (IEEE 1149.1), passive serial, passive parallel asynchronous

数据手册与资源

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