EP20K400CFC672-9 vs EP20K400FC784-2 Vergleich
Detaillierter Direktvergleich von EP20K400CFC672-9 von Altera und EP20K400FC784-2 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K400CFC672-9 | EP20K400FC784-2 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $325,00 | $175,00 |
| Family | APEX-20KC | APEX 20K |
| Logic Elements / Macrocells | 1664 | — |
| Typical Gate Count | 400,000 gates | — |
| Embedded Memory (ESB) | 212,992 bits | — |
| User I/O Count | 488 | — |
| PLLs | 4 | — |
| Core Supply Voltage | 1.71 V to 1.89 V | — |
| I/O Supply Voltage | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Operating Temperature (TJ) | 0 °C to 85 °C | — |
| Speed Grade | -9 (commercial, slowest bin) | -2 (industrial) |
| Gehäuse | 672-ball FineLine BGA (FCBGA) | 784-Ball FineLine BGA (FC) |
| Package Body Size | 27 mm × 27 mm | — |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| Configuration Method | EPC serial device or JTAG | — |
| Process Node | [DATA_NEEDED: process node] | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: not confirmed in provided data] |
| Device Family Member | — | EP20K400C |
| Typical System Gates | — | 400,000 |
| Maximum User I/O Pins | — | 488 (784-BGA) |
| Logic Elements | — | 16,640 |
| Embedded RAM (ESB) | — | 212 Kbits |
| Maximum Block RAM | — | [DATA_NEEDED: block RAM organization per ESB] |
| Maximum Frequency (internal) | — | [DATA_NEEDED: fmax, datasheet-dependent] |
| Process Technology | — | 0.22 µm CMOS SRAM |
| Core Voltage | — | 2.5 V |
| MultiVolt I/O Voltage | — | 1.8 V / 2.5 V / 3.3 V |
| Supported I/O Standards | — | LVTTL, LVCMOS, PCI, SSTL-2, SSTL-3, GTL+, CTT |
| Configuration Mode | — | Serial / Parallel SRAM-volatile (external PROM required) |
| Betriebstemperatur | — | [DATA_NEEDED: exact Tj range] |
| MSL-Level | — | 3 (per Partstack listing) |
| Peak Reflow Temperature | — | 220 °C (per Partstack listing) |
| Hot Socketing | — | Supported |
| JTAG / Boundary-Scan | — | IEEE 1149.1 compliant |