EP20K400CFC672-9 vs EP20K400FC784-2 对比

详细并排对比 EP20K400CFC672-9 出自 Altera 和 EP20K400FC784-2 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K400CFC672-9 EP20K400FC784-2
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $325.00 $175.00
Family APEX-20KC APEX 20K
Logic Elements / Macrocells 1664 —
Typical Gate Count 400,000 gates —
Embedded Memory (ESB) 212,992 bits —
User I/O Count 488 —
PLLs 4 —
Core Supply Voltage 1.71 V to 1.89 V —
I/O Supply Voltage 1.5 V / 1.8 V / 2.5 V / 3.3 V —
Operating Temperature (TJ) 0 °C to 85 °C —
Speed Grade -9 (commercial, slowest bin) -2 (industrial)
封装 672-ball FineLine BGA (FCBGA) 784-Ball FineLine BGA (FC)
Package Body Size 27 mm × 27 mm —
安装类型 Surface Mount (BGA) Surface Mount (BGA)
Configuration Method EPC serial device or JTAG —
Process Node [DATA_NEEDED: process node] —
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: not confirmed in provided data]
Device Family Member — EP20K400C
Typical System Gates — 400,000
Maximum User I/O Pins — 488 (784-BGA)
Logic Elements — 16,640
Embedded RAM (ESB) — 212 Kbits
Maximum Block RAM — [DATA_NEEDED: block RAM organization per ESB]
Maximum Frequency (internal) — [DATA_NEEDED: fmax, datasheet-dependent]
Process Technology — 0.22 µm CMOS SRAM
Core Voltage — 2.5 V
MultiVolt I/O Voltage — 1.8 V / 2.5 V / 3.3 V
Supported I/O Standards — LVTTL, LVCMOS, PCI, SSTL-2, SSTL-3, GTL+, CTT
Configuration Mode — Serial / Parallel SRAM-volatile (external PROM required)
工作温度 — [DATA_NEEDED: exact Tj range]
MSL 等级 — 3 (per Partstack listing)
Peak Reflow Temperature — 220 °C (per Partstack listing)
Hot Socketing — Supported
JTAG / Boundary-Scan — IEEE 1149.1 compliant

数据手册与资源

浏览全部产品 创建 BOM 获取报价