EP20K400FC672-4 vs EP20K400FC672-3X Vergleich
Detaillierter Direktvergleich von EP20K400FC672-4 von Intel und EP20K400FC672-3X von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP20K400FC672-3X - APEX 20K 400K Gates FPGA, 672-BGA | Altera
EP20K400FC672-3X ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP20K400FC672-4 | EP20K400FC672-3X |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $99,40 | $152,40 |
| Family | APEX 20K | — |
| Device Logic Elements | 16640 | — |
| Typical Gates | 400000 | — |
| System Gates | 212992 | — |
| Embedded Memory (Kbits) | 502 | — |
| Maximum User I/O | [DATA_NEEDED: user IO count] | — |
| Speed Grade | -4 (slowest) | -3X |
| Gehäuse | 672-BBGA (FC) | 672-ball FC-FBGA (Fine-pitch Chip-Scale BGA) |
| Montageart | Surface Mount | Surface Mount (BGA) |
| Feuchtigkeitsempfindlichkeitsgrad (MSL) | 3 | — |
| Peak Reflow Temperature | 220 C | — |
| Betriebstemperatur | [DATA_NEEDED: commercial/industrial temp range] | 0 °C to 85 °C (commercial) |
| Versorgungsspannung | [DATA_NEEDED: VCCINT/VCCIO] | — |
| RoHS-Status | unknown | [DATA_NEEDED: RoHS compliance] |
| REACH Status | unknown | — |
| Lead-Free | unknown | — |
| Process Technology | MultiCore (LUT + ESB) | — |
| Design Tool | Quartus II (legacy) | — |
| Logic Family | — | APEX 20K |
| Device Sub-family | — | EP20K400 |
| Technology | — | CMOS 0.22 µm |
| Number of Gates | — | 400,000 (typical) |
| Logic Cells | — | 16,640 |
| Macros / Macrocells | — | 1664 |
| User I/Os | — | 502 |
| Dedicated I/O Lines | — | 496 |
| Core Supply Voltage | — | 2.5 V |
| Maximale Taktfrequenz | — | 181.82 MHz |
| Typical Propagation Delay | — | 2.07 ns |
| Architecture | — | MultiCore (LUT + embedded CAM/RAM) |
| Programming Interface | — | JTAG (IEEE 1149.1) / ByteBlaster / MasterBlaster |