EP20K400FC672-4 vs EP20K400FC672-3X 对比

详细并排对比 EP20K400FC672-4 出自 Intel 和 EP20K400FC672-3X 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP20K400FC672-3X EP20K400FC672-3X - APEX 20K 400K Gates FPGA, 672-BGA | Altera

EP20K400FC672-3X - APEX 20K 400K Gates FPGA, 672-BGA | Altera

EP20K400FC672-3X ⚠ 最后一次采购

规格对比

参数 EP20K400FC672-4 EP20K400FC672-3X
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 最后采购期
库存状态 有库存 有库存
单价(USD) $99.40 $152.40
Family APEX 20K —
Device Logic Elements 16640 —
Typical Gates 400000 —
System Gates 212992 —
Embedded Memory (Kbits) 502 —
Maximum User I/O [DATA_NEEDED: user IO count] —
Speed Grade -4 (slowest) -3X
封装 672-BBGA (FC) 672-ball FC-FBGA (Fine-pitch Chip-Scale BGA)
安装类型 Surface Mount Surface Mount (BGA)
湿敏等级(MSL) 3 —
Peak Reflow Temperature 220 C —
工作温度 [DATA_NEEDED: commercial/industrial temp range] 0 °C to 85 °C (commercial)
电源电压 [DATA_NEEDED: VCCINT/VCCIO] —
RoHS 状态 unknown [DATA_NEEDED: RoHS compliance]
REACH Status unknown —
Lead-Free unknown —
Process Technology MultiCore (LUT + ESB) —
Design Tool Quartus II (legacy) —
Logic Family — APEX 20K
Device Sub-family — EP20K400
Technology — CMOS 0.22 µm
Number of Gates — 400,000 (typical)
Logic Cells — 16,640
Macros / Macrocells — 1664
User I/Os — 502
Dedicated I/O Lines — 496
Core Supply Voltage — 2.5 V
最大时钟频率 — 181.82 MHz
Typical Propagation Delay — 2.07 ns
Architecture — MultiCore (LUT + embedded CAM/RAM)
Programming Interface — JTAG (IEEE 1149.1) / ByteBlaster / MasterBlaster

数据手册与资源

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