EP20K400FI672-3N vs EP20K400FI672-2V Vergleich
Detaillierter Direktvergleich von EP20K400FI672-3N von Altera und EP20K400FI672-2V von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K400FI672-3N | EP20K400FI672-2V |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Unknown | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $195,00 |
| Device Type | CMOS loadable programmable logic device | — |
| Product Family | APEX 20K | — |
| Series | EP20K400 | — |
| Propagation Delay | 3.6 ns | 2.5 ns |
| Maximale Taktfrequenz | 833 MHz | — |
| User I/O Count | 502 | — |
| Nominal Supply Voltage | 2.5 V | — |
| Supply Voltage Range | 2.375 V to 2.625 V | — |
| Process Technology | CMOS | 0.22 µm CMOS |
| Gehäuse | S-PBGA-B672 | 672-BBGA, FCBGA |
| Terminal Count | 672 terminals | — |
| Terminal Pitch | 1.000 mm | — |
| Montageart | Surface mount | Surface Mount (BGA) |
| Logic Capacity | [DATA_NEEDED: logic capacity] | — |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | 0 °C to +85 °C |
| Configuration Method | [DATA_NEEDED: configuration method] | — |
| I/O Standard Support | [DATA_NEEDED: supported I/O standards] | — |
| RoHS-Status | unknown | [DATA_NEEDED: rohs] |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Family | — | APEX 20K |
| Device | — | EP20K400 |
| Logic Elements / Cells | — | 16640 |
| Total System Gates | — | 400000 |
| Embedded Memory Bits | — | 212992 |
| Number of I/O | — | 502 |
| Pin / Ball Count | — | 672 |
| Versorgungsspannung | — | 2.5 V |
| Internal Operating Frequency | — | 200 MHz |
| Logic Family | — | CMOS |
| Configuration Mode | — | Serial / Parallel / JTAG |
| MSL-Level | — | [DATA_NEEDED: msl] |