EP20K400FI672-3N vs EP20K400FI672-2V Comparaison
Comparaison détaillée côte à côte de EP20K400FI672-3N par Altera et EP20K400FI672-2V par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K400FI672-3N | EP20K400FI672-2V |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Unknown | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $195,00 |
| Device Type | CMOS loadable programmable logic device | — |
| Product Family | APEX 20K | — |
| Series | EP20K400 | — |
| Propagation Delay | 3.6 ns | 2.5 ns |
| Fréquence d'horloge maximale | 833 MHz | — |
| User I/O Count | 502 | — |
| Nominal Supply Voltage | 2.5 V | — |
| Supply Voltage Range | 2.375 V to 2.625 V | — |
| Process Technology | CMOS | 0.22 µm CMOS |
| Boîtier | S-PBGA-B672 | 672-BBGA, FCBGA |
| Terminal Count | 672 terminals | — |
| Terminal Pitch | 1.000 mm | — |
| Type de montage | Surface mount | Surface Mount (BGA) |
| Logic Capacity | [DATA_NEEDED: logic capacity] | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | 0 °C to +85 °C |
| Configuration Method | [DATA_NEEDED: configuration method] | — |
| I/O Standard Support | [DATA_NEEDED: supported I/O standards] | — |
| Statut RoHS | unknown | [DATA_NEEDED: rohs] |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Family | — | APEX 20K |
| Device | — | EP20K400 |
| Logic Elements / Cells | — | 16640 |
| Total System Gates | — | 400000 |
| Embedded Memory Bits | — | 212992 |
| Number of I/O | — | 502 |
| Pin / Ball Count | — | 672 |
| Tension d'alimentation | — | 2.5 V |
| Internal Operating Frequency | — | 200 MHz |
| Logic Family | — | CMOS |
| Configuration Mode | — | Serial / Parallel / JTAG |
| Niveau MSL | — | [DATA_NEEDED: msl] |