EP20K400FI672-3X vs EP20K400FI672-2X Vergleich
Detaillierter Direktvergleich von EP20K400FI672-3X von Altera und EP20K400FI672-2X von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP20K400FI672-3X - APEX 20K 400K Gates FPGA, 672-BGA | Altera/Intel
EP20K400FI672-3X ⚠ Letzte Bestellmöglichkeit
Spezifikationsvergleich
| Parameter | EP20K400FI672-3X | EP20K400FI672-2X |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $142,00 | $171,00 |
| Family | APEX 20K | APEX 20K |
| Device Series | EP20K400 | — |
| Maximum System Gates | 400,000 | — |
| Maximum Logic Elements | [DATA_NEEDED: exact LE count for EP20K400] | — |
| Maximum User I/O | 502 | — |
| Gehäuse | 672-ball Fine-Pitch BGA (S-PBGA-B672) | 672-ball BGA (FI672) |
| Terminal Pitch | 1.000 mm | — |
| Nominal Core Voltage (VCCINT) | 2.5 V | — |
| VCCINT Range | 2.375 V to 2.625 V | — |
| Typical Propagation Delay | 3.6 ns | — |
| Maximum Internal Clock Frequency | 833 MHz | — |
| Technology | CMOS SRAM configuration cell | — |
| Speed Grade | -3 (high-performance tier) | -2X |
| Temperature Grade (X suffix) | Industrial / extended | — |
| Feuchtigkeitsempfindlichkeitsgrad (MSL) | 3 | — |
| Peak Reflow Temperature | 220 C | — |
| Montageart | Surface Mount | — |
| RoHS-Status | Compliant (per Intel/Altera product page) | [DATA_NEEDED: RoHS compliance] |
| Logic Elements | — | 16,640 |
| Typical Gates | — | 400,000 system gates |
| Embedded Memory | — | 212,992 bits |
| User I/O Pins | — | 496 |
| Package Code | — | BGA |
| Terminal Form | — | Ball |
| No. of Terminals | — | 672 |
| Package Shape | — | Square |
| Betriebstemperatur | — | -40C to +85C (industrial) |
| Core Voltage | — | 1.8 V |
| I/O Voltage Support | — | 1.8V / 2.5V / 3.3V / 5V (MultiVolt) |
| Configuration Method | — | SRAM (serial EPROM or JTAG) |
| JTAG Support | — | Yes (IEEE 1149.1) |
| Process Technology | — | 0.18 um CMOS, 6-metal |