EP20K400FI672-3X vs EP20K400FI672-2X Comparison

Detailed side-by-side comparison of EP20K400FI672-3X by Altera and EP20K400FI672-2X by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K400FI672-3X EP20K400FI672-2X
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last Time Buy NRND
Family APEX 20K APEX 20K
Device Series EP20K400 —
Maximum System Gates 400,000 —
Maximum Logic Elements [DATA_NEEDED: exact LE count for EP20K400] —
Maximum User I/O 502 —
Package 672-ball Fine-Pitch BGA (S-PBGA-B672) 672-ball BGA (FI672)
Terminal Pitch 1.000 mm —
Nominal Core Voltage (VCCINT) 2.5 V —
VCCINT Range 2.375 V to 2.625 V —
Typical Propagation Delay 3.6 ns —
Maximum Internal Clock Frequency 833 MHz —
Technology CMOS SRAM configuration cell —
Speed Grade -3 (high-performance tier) -2X
Temperature Grade (X suffix) Industrial / extended —
Moisture Sensitivity Level (MSL) 3 —
Peak Reflow Temperature 220 C —
Mounting Type Surface Mount —
RoHS Status Compliant (per Intel/Altera product page) [DATA_NEEDED: RoHS compliance]
Logic Elements — 16,640
Typical Gates — 400,000 system gates
Embedded Memory — 212,992 bits
User I/O Pins — 496
Package Code — BGA
Terminal Form — Ball
No. of Terminals — 672
Package Shape — Square
Operating Temperature — -40C to +85C (industrial)
Core Voltage — 1.8 V
I/O Voltage Support — 1.8V / 2.5V / 3.3V / 5V (MultiVolt)
Configuration Method — SRAM (serial EPROM or JTAG)
JTAG Support — Yes (IEEE 1149.1)
Process Technology — 0.18 um CMOS, 6-metal

Datasheets & Resources

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