EP20K400FI672-3X vs EP20K400FI672-3V Vergleich
Detaillierter Direktvergleich von EP20K400FI672-3X von Altera und EP20K400FI672-3V von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP20K400FI672-3X - APEX 20K 400K Gates FPGA, 672-BGA | Altera/Intel
EP20K400FI672-3X ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP20K400FI672-3X | EP20K400FI672-3V |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $142,00 | $285,00 |
| Family | APEX 20K | APEX 20K (EP20K400) |
| Device Series | EP20K400 | — |
| Maximum System Gates | 400,000 | — |
| Maximum Logic Elements | [DATA_NEEDED: exact LE count for EP20K400] | — |
| Maximum User I/O | 502 | 502 |
| Gehäuse | 672-ball Fine-Pitch BGA (S-PBGA-B672) | 672-ball FineLine BGA (BBGA), 1.0 mm pitch |
| Terminal Pitch | 1.000 mm | — |
| Nominal Core Voltage (VCCINT) | 2.5 V | — |
| VCCINT Range | 2.375 V to 2.625 V | — |
| Typical Propagation Delay | 3.6 ns | — |
| Maximum Internal Clock Frequency | 833 MHz | — |
| Technology | CMOS SRAM configuration cell | — |
| Speed Grade | -3 (high-performance tier) | -3 (faster) |
| Temperature Grade (X suffix) | Industrial / extended | — |
| Feuchtigkeitsempfindlichkeitsgrad (MSL) | 3 | — |
| Peak Reflow Temperature | 220 C | — |
| Montageart | Surface Mount | Surface Mount |
| RoHS-Status | Compliant (per Intel/Altera product page) | [DATA_NEEDED: RoHS status] |
| Logic Elements | — | 16,640 |
| Maximum Gates | — | 400,000 |
| Typical Gates | — | [DATA_NEEDED: typical gates value] |
| Embedded Memory (bits) | — | 212,992 |
| Dedicated Inputs | — | 6 |
| Total User I/O + Dedicated Inputs | — | 496 + 6 (variant dependent) |
| Maximale Taktfrequenz | — | 714.2 MHz |
| Core Voltage (VCCINT) | — | 2.5 V nominal (2.375 V to 2.625 V) |
| Process Technology | — | 0.18 µm CMOS, 4 metal layers |
| Programmable via JTAG | — | Yes (IEEE 1149.1) |
| Supported I/O Standards | — | LVCMOS, LVTTL, SSTL, GTL+, HSTL |
| Configuration Modes | — | JTAG, passive serial, passive parallel |
| Betriebstemperatur | — | -40 °C to +85 °C (industrial) |
| MSL-Level | — | [DATA_NEEDED: MSL rating] |