EP20K400FI672-3X vs EP20K400FI672-3V 对比

详细并排对比 EP20K400FI672-3X 出自 Altera 和 EP20K400FI672-3V 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP20K400FI672-3X EP20K400FI672-3X - APEX 20K 400K Gates FPGA, 672-BGA | Altera/Intel

EP20K400FI672-3X - APEX 20K 400K Gates FPGA, 672-BGA | Altera/Intel

EP20K400FI672-3X ⚠ 最后一次采购

规格对比

参数 EP20K400FI672-3X EP20K400FI672-3V
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 Obsolete
库存状态 有库存 有库存
单价(USD) $142.00 $285.00
Family APEX 20K APEX 20K (EP20K400)
Device Series EP20K400 —
Maximum System Gates 400,000 —
Maximum Logic Elements [DATA_NEEDED: exact LE count for EP20K400] —
Maximum User I/O 502 502
封装 672-ball Fine-Pitch BGA (S-PBGA-B672) 672-ball FineLine BGA (BBGA), 1.0 mm pitch
Terminal Pitch 1.000 mm —
Nominal Core Voltage (VCCINT) 2.5 V —
VCCINT Range 2.375 V to 2.625 V —
Typical Propagation Delay 3.6 ns —
Maximum Internal Clock Frequency 833 MHz —
Technology CMOS SRAM configuration cell —
Speed Grade -3 (high-performance tier) -3 (faster)
Temperature Grade (X suffix) Industrial / extended —
湿敏等级(MSL) 3 —
Peak Reflow Temperature 220 C —
安装类型 Surface Mount Surface Mount
RoHS 状态 Compliant (per Intel/Altera product page) [DATA_NEEDED: RoHS status]
Logic Elements — 16,640
Maximum Gates — 400,000
Typical Gates — [DATA_NEEDED: typical gates value]
Embedded Memory (bits) — 212,992
Dedicated Inputs — 6
Total User I/O + Dedicated Inputs — 496 + 6 (variant dependent)
最大时钟频率 — 714.2 MHz
Core Voltage (VCCINT) — 2.5 V nominal (2.375 V to 2.625 V)
Process Technology — 0.18 µm CMOS, 4 metal layers
Programmable via JTAG — Yes (IEEE 1149.1)
Supported I/O Standards — LVCMOS, LVTTL, SSTL, GTL+, HSTL
Configuration Modes — JTAG, passive serial, passive parallel
工作温度 — -40 °C to +85 °C (industrial)
MSL 等级 — [DATA_NEEDED: MSL rating]

数据手册与资源

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