EP20K400GC655-1 vs EP20K400GC655-1V Vergleich
Detaillierter Direktvergleich von EP20K400GC655-1 von Intel und EP20K400GC655-1V von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP20K400GC655-1 - 400K Gate APEX 20K FPGA, 655-pin CPGA | Intel/Altera
EP20K400GC655-1 ObsoleteSpezifikationsvergleich
| Parameter | EP20K400GC655-1 | EP20K400GC655-1V |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $135,00 | $555,00 |
| Family | APEX 20K | APEX 20KE |
| Series | EP20K400 | — |
| Logic Elements | 16,640 | 16,640 |
| Maximum Gates | 1,052,000 | — |
| Typical Gates | 400,000 | — |
| Embedded System Blocks (ESBs) | 4 | — |
| Total RAM Bits | 212,992 | — |
| Maximum User I/O | 502 | 496 |
| Dedicated Inputs | 6 | 6 |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Core Supply Voltage | 2.5 V | — |
| I/O Supply Voltage | 3.3 V | — |
| Maximum Internal Frequency | 250 MHz | 250 MHz (-1V speed grade) |
| Propagation Delay | 2.5 ns | 2.5 ns |
| Gehäuse | 655-pin CPGA (Ceramic Pin Grid Array) | CBGA-655 (Ceramic Ball Grid Array) |
| Pin-Anzahl | 655 | — |
| Montageart | Through-Hole | — |
| Betriebstemperatur | 0 °C to +85 °C (commercial) | — |
| Configuration Modes | Passive Serial, Passive Parallel Async, Passive Parallel Sync | — |
| Boundary Scan | IEEE 1149.1 (JTAG) | — |
| RoHS-Status | Non-compliant (contains lead in ceramic package) | — |
| Typical Gate Count | — | 400,000 gates |
| Embedded Memory | — | 212,992 bits |
| Total Terminals | — | 655 |
| Supply Voltage (Core) | — | 2.375 V to 2.625 V (nominal 2.5 V) |
| LVDS Support | — | Yes |
| Moisture Sensitivity Level | — | MSL 1 |
| Peak Reflow Temperature | — | 220 °C |
| Qualification | — | Not Qualified |
| Programming Interface | — | IEEE 1532 / JTAG |