EP20K400GC655-3 vs EP20K400GC655-3X Vergleich
Detaillierter Direktvergleich von EP20K400GC655-3 von Intel und EP20K400GC655-3X von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP20K400GC655-3 - 400K Gate APEX-20KC FPGA 655-BCPGA | Intel
EP20K400GC655-3 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP20K400GC655-3 | EP20K400GC655-3X |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $310,00 | $65,00 |
| Series | APEX-20KC | APEX-20KC |
| Family | APEX 20K | APEX 20K (MultiCore architecture, LUT + product-term + embedded memory) |
| Manufacturer | Intel (formerly Altera) | Altera (now Intel FPGA) |
| Logic Elements | 16640 | — |
| Total RAM Bits | 212992 | 212,992 bits |
| Number of Gates | 400000 | — |
| Supply Voltage - Core | 1.71 V to 1.89 V (1.8 V nominal) | — |
| I/O Voltage Tolerance | MultiVolt I/O: 1.8 V / 2.5 V / 3.3 V / 5 V | — |
| Betriebstemperatur | -40C to +85C (industrial) | [DATA_NEEDED: operating temperature range] |
| Maximum Frequency | 167 MHz (per FPGAkey) | — |
| Process Technology | 0.22 um CMOS | 0.22 µm CMOS |
| Gehäuse / Bauform | 655-BCPGA | 655-BCPGA (CPGA655, 62.48 x 62.48 mm) |
| Supplier Device Package | 655-CPGA (62.48 x 62.48 mm) | — |
| Speed Grade | -3 (slowest grade in family) | -3 (fastest) |
| Propagation Delay (tPD) | 3.6 ns (per Microchip USA listing) | — |
| JTAG Support | IEEE 1149.1 Boundary-Scan | — |
| Configuration Modes | Passive Serial, Passive Parallel Sync/Async, Active Serial | — |
| RoHS-Status | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status - ceramic CPGA historically non-RoHS] |
| Logic Elements / Cells | — | 16,640 |
| System Gates | — | 400,000 |
| Maximum Internal Frequency | — | 167 MHz (speed grade -3) |
| Core Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V |
| I/O Supply Voltage (VCCIO) | — | 2.5 V (LVDS support per APEX 20KE datasheet) |
| Montageart | — | Through-Hole (CPGA, ceramic) |
| Suffix Code | — | -X (extended / ceramic CPGA variant) |
| I/O Count | — | [DATA_NEEDED: max user I/O] |
| JTAG / Boundary Scan | — | IEEE 1149.1 (per APEX 20K family) |