EP20K400GI655-1X vs EP20K400GI655-2 Vergleich
Detaillierter Direktvergleich von EP20K400GI655-1X von Altera und EP20K400GI655-2 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP20K400GI655-1X - 400K Gate APEX 20K FPGA, 16640 Logic Elements, 655-Pin CPGA | Altera (Intel)
EP20K400GI655-1X ObsoleteSpezifikationsvergleich
| Parameter | EP20K400GI655-1X | EP20K400GI655-2 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $160,00 | $175,00 |
| Family | APEX 20K | — |
| Device | EP20K400 | — |
| Logic Elements | 16640 | — |
| Number of Terminals | 655 | 655 |
| User I/O Lines | 502 | — |
| Dedicated Inputs | 4 | 6 |
| Package Type | Ceramic Pin Grid Array (CPGA) | — |
| Package Code (JESD-30) | S-CPGA-P655 | — |
| Package Equivalence Code | SPGA655,47X47 | — |
| Package Body Material | CERAMIC (metal-sealed co-fired) | — |
| Speed Grade | -1 | — |
| Propagation Delay | 2.5 ns (typical for -1 grade) | 3.1 ns (typical) |
| Process Technology | CMOS, SRAM-based configuration | — |
| Feuchtigkeitsempfindlichkeitsgrad (MSL) | 1 | — |
| Peak Reflow Temperature | 220 C | — |
| Betriebstemperatur | -40 C to +85 C (industrial) | -40C to +85C (industrial) |
| Montageart | Through-Hole (PGA) | Through-Hole / Socket |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS status] |
| Manufacturer | — | Altera Corporation |
| Series | — | APEX 20K (EP20K400) |
| Device Type | — | Field Programmable Gate Array (FPGA) |
| Typical Gate Count | — | 400,000 gates |
| Logic Elements (LE) | — | 16,640 |
| Maximum User I/O | — | 496 |
| Gehäuse | — | SPGA-655 (47 mm x 47 mm) |
| Nominal Supply Voltage | — | 2.5 V |
| Supply Voltage Range | — | 2.375 V to 2.625 V |
| Technology | — | CMOS SRAM |
| Moisture Sensitivity Level | — | 1 (per Altera family) |
| Configuration Method | — | JTAG, Passive Serial, Passive Parallel |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, GTL+ |
| Embedded Memory | — | Embedded System Blocks (ESBs) |
| Lebenszyklusstatus | — | Obsolete (legacy Altera APEX 20K family) |