EP20K400GI655-3 vs EP20K400GC655-3 Vergleich

Detaillierter Direktvergleich von EP20K400GI655-3 von Altera und EP20K400GC655-3 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Intel
EP20K400GC655-3 EP20K400GC655-3 - 400K Gate APEX-20KC FPGA 655-BCPGA | Intel

EP20K400GC655-3 - 400K Gate APEX-20KC FPGA 655-BCPGA | Intel

EP20K400GC655-3 ⚠ Letzte Bestellmöglichkeit

Spezifikationsvergleich

Parameter EP20K400GI655-3 EP20K400GC655-3
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Letzte Kaufgelegenheit
Lagerstatus In Stock In Stock
Stückpreis (USD) $55,00 $310,00
Family APEX 20KE APEX 20K
Logic Elements / Cells 16,640 —
System Gates 400,000 (maximum) —
Maximum User I/O 502 —
Dedicated Inputs 4 —
Number of Terminals 655 —
Gehäuse 655-Pin PGA (Plastic/CPGA, square) —
JESD-30 Code S-CPGA-P655 —
Package Shape Square —
Form of Terminal PIN/PEG (through-hole) —
Montageart Through-Hole (Socket) —
Process Technology CMOS, 2.5V core 0.22 um CMOS
Core Supply Voltage 2.5 V —
I/O Supply Voltage 2.5 V or 3.3 V (MultiVolt I/O) —
Betriebstemperatur 0°C to 70°C (Industrial I grade) -40C to +85C (industrial)
Speed Grade -3 (slowest of the EP20K400 family) -3 (slowest grade in family)
Configuration Modes Passive Serial, Passive Parallel Asynchronous, JTAG Passive Serial, Passive Parallel Sync/Async, Active Serial
Embedded Memory Dual-port RAM via Embedded System Blocks (ESBs) —
JTAG / Boundary Scan IEEE 1149.1 compliant —
RoHS-Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: rohs status]
Series — APEX-20KC
Manufacturer — Intel (formerly Altera)
Logic Elements — 16640
Total RAM Bits — 212992
Number of Gates — 400000
Supply Voltage - Core — 1.71 V to 1.89 V (1.8 V nominal)
I/O Voltage Tolerance — MultiVolt I/O: 1.8 V / 2.5 V / 3.3 V / 5 V
Maximum Frequency — 167 MHz (per FPGAkey)
Gehäuse / Bauform — 655-BCPGA
Supplier Device Package — 655-CPGA (62.48 x 62.48 mm)
Propagation Delay (tPD) — 3.6 ns (per Microchip USA listing)
JTAG Support — IEEE 1149.1 Boundary-Scan

Datenblätter & Ressourcen

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