EP20K600CB652C7E5 vs EP20K600CB652I7 Vergleich
Detaillierter Direktvergleich von EP20K600CB652C7E5 von Intel und EP20K600CB652I7 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K600CB652C7E5 | EP20K600CB652I7 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $175,00 | $149,00 |
| Family | APEX 20KC | APEX 20KC |
| Typical Gate Count | 600K gates | — |
| Logic Elements / Macros | 24,320 | — |
| Maximum User I/O | 488 | — |
| Embedded Memory (EAB bits) | 311,296 bits | — |
| Gehäuse | 652-ball FineLine BGA | 652-ball FineLine BGA (LBGA, 1.27 mm pitch) |
| Core Voltage | 1.8 V | — |
| Process Technology | 0.15 um CMOS | — |
| Betriebstemperatur | 0C to +85C (commercial, suffix C7) | -40 °C to +85 °C (industrial, 'I' suffix) |
| Speed Grade | 7 (-1 speed bin equivalent, E5 suffix) | -7 |
| PLL Count | 4 | — |
| Supported I/O Standards | LVTTL, LVCMOS, PCI, SSTL, HSTL | — |
| Configuration Scheme | Passive Serial / JTAG / EPC16 / EPC8 | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | unknown |
| Lebenszyklusstatus | Obsolete - last time buy has passed | — |
| Manufacturer | — | Intel (formerly Altera) |
| Technology | — | 0.15 µm CMOS, SRAM-based |
| System Gates | — | 600,000 |
| Logic Elements | — | 24,320 |
| Maximum Internal Frequency | — | 375.94 MHz |
| Propagation Delay | — | 1.6 ns |
| Core Supply Voltage | — | 1.8 V (1.71 V to 1.89 V range) |
| User I/O Count | — | 488 (4 dedicated inputs + 480 I/O) |
| Anzahl der Ausgänge | — | 480 |
| Montageart | — | Surface Mount |
| Programming Interface | — | JTAG (IEEE 1149.1), in-system programmable |
| Embedded Memory | — | ESBs configurable as dual-port RAM / ROM / CAM |
| MultiVolt I/O Support | — | 1.8 V / 2.5 V / 3.3 V / 5.0 V tolerant banks |