EP20K600CB672C7 vs EP20K600CF672-3 Vergleich

Detaillierter Direktvergleich von EP20K600CB672C7 von Altera und EP20K600CF672-3 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP20K600CB672C7 EP20K600CF672-3
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $182,50 $99,50
Family APEX 20KC APEX 20KC
Device Type FPGA / Programmable Logic Device (PLD) —
Typical Gates 600,000 600,000
Maximum System Gates 1,053,840 2,432,000
Logic Elements 30,960 (typical) —
Embedded Memory 311 kbits (EAB-based) —
User I/Os 488 —
Gehäuse 672-ball FineLine BGA (45 x 45 mm, 1.27 mm pitch) 672-ball FineLine BGA
Speed Grade C7 (commercial, 0 °C to 85 °C) -3
Propagation Delay 1.48 ns —
Process Technology 0.15 µm all-layer copper-metal CMOS 0.18 µm CMOS
Core Voltage 2.5 V —
I/O Voltage Support 1.8 V, 2.5 V, 3.3 V (MultiVolt I/O) —
Number of PLLs 4 —
Dual-Port RAM Yes (4.5 ns access) —
Supported I/O Standards LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, AGP, HSTL, CTT —
Betriebstemperatur 0 °C to 85 °C (commercial) [DATA_NEEDED: operating temperature range]
Configuration Method EPC configuration devices / JTAG / passive serial —
RoHS-Status Compliant Lead-free / RoHS compliant (per Alibaba listing)
Maximum Logic Elements — 2,432
Embedded System Memory — 311,040 bits (380 Kbits ESB)
User I/O Pins — 488
PLLs — 4
Maximum Internal Frequency — 180 MHz (per APEX 20K family datasheet)
Configuration Modes — PS, PPS, PPA, JTAG, EPC2/EPC16
I/O Standards Supported — LVTTL, LVCMOS, SSTL-2/3, HSTL, LVDS, PCI
Montageart — Surface Mount

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