EP20K600CB672C7 vs EP20K600CF672-3 对比
详细并排对比 EP20K600CB672C7 出自 Altera 和 EP20K600CF672-3 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP20K600CB672C7 | EP20K600CF672-3 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $182.50 | $99.50 |
| Family | APEX 20KC | APEX 20KC |
| Device Type | FPGA / Programmable Logic Device (PLD) | — |
| Typical Gates | 600,000 | 600,000 |
| Maximum System Gates | 1,053,840 | 2,432,000 |
| Logic Elements | 30,960 (typical) | — |
| Embedded Memory | 311 kbits (EAB-based) | — |
| User I/Os | 488 | — |
| 封装 | 672-ball FineLine BGA (45 x 45 mm, 1.27 mm pitch) | 672-ball FineLine BGA |
| Speed Grade | C7 (commercial, 0 °C to 85 °C) | -3 |
| Propagation Delay | 1.48 ns | — |
| Process Technology | 0.15 µm all-layer copper-metal CMOS | 0.18 µm CMOS |
| Core Voltage | 2.5 V | — |
| I/O Voltage Support | 1.8 V, 2.5 V, 3.3 V (MultiVolt I/O) | — |
| Number of PLLs | 4 | — |
| Dual-Port RAM | Yes (4.5 ns access) | — |
| Supported I/O Standards | LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, AGP, HSTL, CTT | — |
| 工作温度 | 0 °C to 85 °C (commercial) | [DATA_NEEDED: operating temperature range] |
| Configuration Method | EPC configuration devices / JTAG / passive serial | — |
| RoHS 状态 | Compliant | Lead-free / RoHS compliant (per Alibaba listing) |
| Maximum Logic Elements | — | 2,432 |
| Embedded System Memory | — | 311,040 bits (380 Kbits ESB) |
| User I/O Pins | — | 488 |
| PLLs | — | 4 |
| Maximum Internal Frequency | — | 180 MHz (per APEX 20K family datasheet) |
| Configuration Modes | — | PS, PPS, PPA, JTAG, EPC2/EPC16 |
| I/O Standards Supported | — | LVTTL, LVCMOS, SSTL-2/3, HSTL, LVDS, PCI |
| 安装类型 | — | Surface Mount |