EP20K600CF1020C7 vs EP20K600CEF672C7 Vergleich

Detaillierter Direktvergleich von EP20K600CF1020C7 von Altera und EP20K600CEF672C7 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Altera
EP20K600CF1020C7 EP20K600CF1020C7 - APEX 20KC 600K Gates 1.8V FPGA | Altera

EP20K600CF1020C7 - APEX 20KC 600K Gates 1.8V FPGA | Altera

EP20K600CF1020C7 ⚠ Letzte Bestellmöglichkeit

Spezifikationsvergleich

Parameter EP20K600CF1020C7 EP20K600CEF672C7
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Letzte Kaufgelegenheit Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $212,40 $98,40
Family APEX 20KC APEX 20KC (Enhanced Configuration)
Manufacturer Altera (now Intel) Intel (formerly Altera)
Typical Gates 311,000 —
Maximum System Gates 600,000 —
Logic Elements / Cells 24,320 24,320
Maximum Operating Frequency 375.94 MHz 375.94 MHz
Process Technology 0.15 micrometer CMOS 0.15 µm CMOS, all-layer copper
Core Voltage (VCCINT) 1.71 V to 1.89 V (nominal 1.8 V) —
I/O Voltage (VCCIO) 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) —
User I/O Count 588 —
Total Inputs 580 + 4 dedicated —
Propagation Delay (Tpd) 1.6 ns —
Gehäuse 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA) 672-ball FineLine BGA (FC-FBGA)
Montageart Surface Mount (BGA) —
Operating Temperature Grade Commercial (C) —
Speed Grade 7 —
Configuration Method SRAM-based, serial/parallel passive or enhanced configuration device —
RoHS-Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Lead-Free [DATA_NEEDED: lead-free status] —
Series — APEX 20KC
Device Type — FPGA / Loadable PLD
Gate Count (typical) — 600,000 gates
Propagation Delay — 1.48 ns (typ)
User I/Os — 488
Core Supply Voltage — 1.8 V
Package Code — BGA-652, 45 x 45 mm, 1.27 mm pitch
Betriebstemperatur — 0 °C to +85 °C (commercial)
Configuration — SRAM-based, serial or parallel (EPC)
Embedded Memory — EAB blocks (dual-port RAM with byte enables)
LVDS Support — True-LVDS channels integrated
MultiVolt I/O — 1.8 V, 2.5 V, 3.3 V interfaces
External Memory Interface — DDR SDRAM, QDR SRAM
JTAG Support — IEEE 1149.1 boundary-scan

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