EP20K600CF672C7N vs EP20K600CF672-1X Vergleich

Detaillierter Direktvergleich von EP20K600CF672C7N von Altera und EP20K600CF672-1X von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP20K600CF672C7N EP20K600CF672-1X
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete NRND
Lagerstatus In Stock In Stock
Stückpreis (USD) $108,00 $95,00
Device Family APEX 20KC APEX 20KC MultiCore FPGA
Maximum System Gates 1,052,000 —
Typical Gates 600,000 —
Logic Elements / Cells 24,320 —
Maximum User I/O Pins 488 —
Total Package Pins 652 —
Gehäuse FC-FBGA (BGA-652) 45 x 45 mm, 1.27 mm pitch 672-ball BGA (CF672), 1.27 mm pitch
Core Voltage 1.8 V —
Maximum Operating Frequency 375.94 MHz —
Propagation Delay 1.48 ns —
Process Technology 0.15 µm all-layer copper-metal CMOS 0.18 um SRAM CMOS
Architecture MultiCore (LUT + Embedded System Memory) —
Betriebstemperatur 0 °C to +85 °C (Commercial) [DATA_NEEDED: industrial temp range]
Speed Grade C7 -1 (industrial speed grade, X = lead-free)
Seated Height 3.50 mm —
Montageart Surface Mount (BGA) Surface Mount (BGA)
RoHS-Status unknown Compliant (per Alibaba distributor listing: "RoHS Compliant")
Series — APEX 20KC
Maximum Typical Gates — 600,000
Logic Elements — 31,104 (per Altera APEX 20KC datasheet family)
Embedded System Blocks (ESBs) — up to 256
Embedded Memory (max bits) — [DATA_NEEDED: ESB RAM bits]
PLLs — 4
Maximum User I/O — [DATA_NEEDED: max user I/O count]
Configuration Method — SRAM, JTAG (IEEE 1149.1), EPC passive serial
Versorgungsspannung — [DATA_NEEDED: VCCINT/VCCIO]
MSL-Level — [DATA_NEEDED: MSL rating]

Datenblätter & Ressourcen

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