EP20K600CF672C7N vs EP20K600CF672-1X 对比

详细并排对比 EP20K600CF672C7N 出自 Altera 和 EP20K600CF672-1X 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K600CF672C7N EP20K600CF672-1X
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $108.00 $95.00
Device Family APEX 20KC APEX 20KC MultiCore FPGA
Maximum System Gates 1,052,000 —
Typical Gates 600,000 —
Logic Elements / Cells 24,320 —
Maximum User I/O Pins 488 —
Total Package Pins 652 —
封装 FC-FBGA (BGA-652) 45 x 45 mm, 1.27 mm pitch 672-ball BGA (CF672), 1.27 mm pitch
Core Voltage 1.8 V —
Maximum Operating Frequency 375.94 MHz —
Propagation Delay 1.48 ns —
Process Technology 0.15 µm all-layer copper-metal CMOS 0.18 um SRAM CMOS
Architecture MultiCore (LUT + Embedded System Memory) —
工作温度 0 °C to +85 °C (Commercial) [DATA_NEEDED: industrial temp range]
Speed Grade C7 -1 (industrial speed grade, X = lead-free)
Seated Height 3.50 mm —
安装类型 Surface Mount (BGA) Surface Mount (BGA)
RoHS 状态 unknown Compliant (per Alibaba distributor listing: "RoHS Compliant")
Series — APEX 20KC
Maximum Typical Gates — 600,000
Logic Elements — 31,104 (per Altera APEX 20KC datasheet family)
Embedded System Blocks (ESBs) — up to 256
Embedded Memory (max bits) — [DATA_NEEDED: ESB RAM bits]
PLLs — 4
Maximum User I/O — [DATA_NEEDED: max user I/O count]
Configuration Method — SRAM, JTAG (IEEE 1149.1), EPC passive serial
电源电压 — [DATA_NEEDED: VCCINT/VCCIO]
MSL 等级 — [DATA_NEEDED: MSL rating]

数据手册与资源

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