EP20K600CF672C8N vs EP20K600CF672 Vergleich

Detaillierter Direktvergleich von EP20K600CF672C8N von Intel und EP20K600CF672 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Intel
EP20K600CF672 EP20K600CF672 - 600K APEX 20KC FPGA, 672-BGA | Intel

EP20K600CF672 - 600K APEX 20KC FPGA, 672-BGA | Intel

EP20K600CF672 [data_needed: lifecycle status]

Spezifikationsvergleich

Parameter EP20K600CF672C8N EP20K600CF672
Marke Intel Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Aktiv [DATA NEEDED: Lifecycle Status]
Lagerstatus In Stock In Stock
Stückpreis (USD) $108,00 $0,00
Device Type SPLD —
Product Type FPGA / programmable logic device Field-Programmable Gate Array (FPGA)
Family APEX 20KC —
Nominal Gate Capacity 600K gates —
Logic Elements or Cells 24,320 —
Macros 2,432 —
User I/O Count 508 —
Package Terminals 652 pins —
Gehäuse BGA-652, 45 x 45 mm, 1.27 mm pitch —
Package Description 672-pin FC-FBGA —
Versorgungsspannung 1.8 V —
Listed Frequency 301.21 MHz —
Propagation Delay 1.48 ns 1.48 ns for supplied EP20K600CF672C9N/C8N references
Fabrication Process 0.15 µm —
Betriebstemperatur 0°C to 85°C 0 C to 85 C for supplied EP20K600CF672C9N/C8N references
Interconnect Metal All-layer copper metal —
I/O Configuration 508 user I/O —
Montageart Surface mount Surface Mount
RoHS-Status unknown unknown
REACH Status unknown unknown
AEC-Q100 Qualification unknown —
Configuration Method [DATA_NEEDED: configuration memory and programming method] —
Core Current [DATA_NEEDED: core supply current] —
I/O Bank Voltage [DATA_NEEDED: supported I/O voltage range] —
Junction Temperature [DATA_NEEDED: maximum junction temperature] —
Wärmewiderstand [DATA_NEEDED: junction-to-ambient thermal resistance] —
Product Family — APEX-20KC
Manufacturer — Altera / Intel
User I/O Lines — 508 I/O
Logic Elements — [DATA_NEEDED: logic element count]
Device Type Listed by Supplied References — SPLD
Process Technology — 0.15 um all-layer copper-metal process for supplied family references
Performance Claim — Up to 35% faster than APEX 20KE devices
Package Type — 672-ball BGA, FCBGA
Package Dimensions — 45 mm x 45 mm
Ball Pitch — 1.27 mm
Configuration Device Type — Enhanced Configuration (EPC) device
Core Voltage — [DATA_NEEDED: core supply voltage]
I/O Voltage — [DATA_NEEDED: I/O supply voltage]
Configuration Memory — [DATA_NEEDED: configuration memory type and capacity]
Embedded Memory — [DATA_NEEDED: embedded memory capacity]
AEC-Q100 Status — unknown

Datenblätter & Ressourcen

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