EP20K600CF672I7 vs EP20K600CF672I9 Vergleich

Detaillierter Direktvergleich von EP20K600CF672I7 von Altera und EP20K600CF672I9 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP20K600CF672I7 EP20K600CF672I9
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $220,00 $152,00
Family APEX 20KC APEX 20KC
Maximum Logic Elements 24,320 cells —
System Gates 600,000 600,000
Maximum User I/O 508 —
Maximum Internal Frequency 375.94 MHz —
Process Technology 0.15 µm CMOS 0.15 µm CMOS
Core Supply Voltage (VCCINT) 1.8 V —
I/O Supply Voltage (VCCIO) 3.3 V (LVTTL/LVCMOS compatible) —
Speed Grade -7 9 (fastest bin)
Betriebstemperatur -40 °C to +100 °C (industrial, I-suffix) —
Gehäuse 672-ball FineLine BGA (FC-FBGA, 27×27 mm) 672-pin FC-FBGA
Ball Pitch 1.00 mm —
Embedded System Blocks Yes (dual-port RAM / CAM) —
Configuration Interface IEEE 1149.1 JTAG, passive serial, fast passive parallel —
Montageart Surface Mount (BGA) Surface Mount (BGA)
RoHS-Status [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS status]
Logic Elements / Cells — 24,320
Maximum Operating Frequency — 250 MHz
Core Voltage — 1.8 V
Temperature Grade — Industrial (-40°C to +85°C)
User I/O Pins — 311 (max)
Embedded Array Blocks (EABs) — [DATA_NEEDED: EAB count]
Embedded Memory — [DATA_NEEDED: total RAM bits]
PLLs — Up to 4
I/O Standards Supported — LVTTL, LVCMOS, PCI, LVDS
Configuration Mode — Passive Serial / JTAG
Maximum Seated Height — 2.1 mm
MSL-Level — [DATA_NEEDED: MSL level]
Lead-Free — [DATA_NEEDED: lead-free]

Datenblätter & Ressourcen

Alle Produkte durchsuchen BOM erstellen Angebot anfordern