EP20K600CF672I7 vs EP20K600CF672I9 对比

详细并排对比 EP20K600CF672I7 出自 Altera 和 EP20K600CF672I9 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K600CF672I7 EP20K600CF672I9
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $220.00 $152.00
Family APEX 20KC APEX 20KC
Maximum Logic Elements 24,320 cells —
System Gates 600,000 600,000
Maximum User I/O 508 —
Maximum Internal Frequency 375.94 MHz —
Process Technology 0.15 µm CMOS 0.15 µm CMOS
Core Supply Voltage (VCCINT) 1.8 V —
I/O Supply Voltage (VCCIO) 3.3 V (LVTTL/LVCMOS compatible) —
Speed Grade -7 9 (fastest bin)
工作温度 -40 °C to +100 °C (industrial, I-suffix) —
封装 672-ball FineLine BGA (FC-FBGA, 27×27 mm) 672-pin FC-FBGA
Ball Pitch 1.00 mm —
Embedded System Blocks Yes (dual-port RAM / CAM) —
Configuration Interface IEEE 1149.1 JTAG, passive serial, fast passive parallel —
安装类型 Surface Mount (BGA) Surface Mount (BGA)
RoHS 状态 [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS status]
Logic Elements / Cells — 24,320
Maximum Operating Frequency — 250 MHz
Core Voltage — 1.8 V
Temperature Grade — Industrial (-40°C to +85°C)
User I/O Pins — 311 (max)
Embedded Array Blocks (EABs) — [DATA_NEEDED: EAB count]
Embedded Memory — [DATA_NEEDED: total RAM bits]
PLLs — Up to 4
I/O Standards Supported — LVTTL, LVCMOS, PCI, LVDS
Configuration Mode — Passive Serial / JTAG
Maximum Seated Height — 2.1 mm
MSL 等级 — [DATA_NEEDED: MSL level]
Lead-Free — [DATA_NEEDED: lead-free]

数据手册与资源

浏览全部产品 创建 BOM 获取报价