EP20K600CF672I7N vs EP20K600CF672I8AA Vergleich
Detaillierter Direktvergleich von EP20K600CF672I7N von Intel und EP20K600CF672I8AA von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP20K600CF672I8AA - APEX 20KC 600K Gate FPGA | Intel
EP20K600CF672I8AA ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP20K600CF672I7N | EP20K600CF672I8AA |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $232,00 | $97,50 |
| Family | APEX 20KC | — |
| Technology | 0.15 µm CMOS | 0.15 um CMOS |
| Maximum System Gates | 600,000 | — |
| Logic Elements | 24,320 | — |
| Maximum User I/O Pins | 508 | — |
| Maximum Internal Frequency | 376 MHz | — |
| Embedded System Blocks (ESBs) | 160 | — |
| Total Embedded RAM (max) | 311,296 bits | — |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | 2.5 V / 3.3 V (MultiVolt, bank-dependent) | — |
| Gehäuse | 672-ball FineLine BGA (FC-FBGA) | 672-FBGA (27 x 27 mm) |
| Ball Pitch | 1.0 mm | — |
| Package Body Size | 27 mm × 27 mm | — |
| Speed Grade | I7 (-40 °C to +100 °C industrial) | I8 |
| Propagation Delay (typical) | 1.6 ns | — |
| Configuration Method | JTAG (IEEE 1149.1) + EPC configuration device | — |
| Lead-Free Finish (N suffix) | Yes | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance] | Compliant |
| Series | — | APEX 20KC |
| Logic Elements / Cells | — | 24,320 |
| Total Gates | — | 600,000 (system gates) |
| Total RAM Bits | — | 311,296 |
| Number of I/O | — | 508 |
| Number of LABs/CLBs | — | 1,520 |
| Versorgungsspannung | — | 1.71 V to 1.89 V |
| Montageart | — | Surface Mount |
| Betriebstemperatur | — | -40C to +85C (industrial) |
| I/O Standards | — | LVTTL, LVCMOS, PCI, GTL, SSTL-2/3, HSTL, LVDS, LVPECL |
| Number of PLLs | — | 4 |
| Lead Free | — | Yes |
| Number of Logic Array Blocks | — | 1,520 (40 LABs per MegaLAB) |