EP20K600CF672I7N vs EP20K600CF672I8AA 对比
详细并排对比 EP20K600CF672I7N 出自 Intel 和 EP20K600CF672I8AA 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP20K600CF672I7N | EP20K600CF672I8AA |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 最后采购期 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $232.00 | $97.50 |
| Family | APEX 20KC | — |
| Technology | 0.15 µm CMOS | 0.15 um CMOS |
| Maximum System Gates | 600,000 | — |
| Logic Elements | 24,320 | — |
| Maximum User I/O Pins | 508 | — |
| Maximum Internal Frequency | 376 MHz | — |
| Embedded System Blocks (ESBs) | 160 | — |
| Total Embedded RAM (max) | 311,296 bits | — |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | 2.5 V / 3.3 V (MultiVolt, bank-dependent) | — |
| 封装 | 672-ball FineLine BGA (FC-FBGA) | 672-FBGA (27 x 27 mm) |
| Ball Pitch | 1.0 mm | — |
| Package Body Size | 27 mm × 27 mm | — |
| Speed Grade | I7 (-40 °C to +100 °C industrial) | I8 |
| Propagation Delay (typical) | 1.6 ns | — |
| Configuration Method | JTAG (IEEE 1149.1) + EPC configuration device | — |
| Lead-Free Finish (N suffix) | Yes | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance] | Compliant |
| Series | — | APEX 20KC |
| Logic Elements / Cells | — | 24,320 |
| Total Gates | — | 600,000 (system gates) |
| Total RAM Bits | — | 311,296 |
| Number of I/O | — | 508 |
| Number of LABs/CLBs | — | 1,520 |
| 电源电压 | — | 1.71 V to 1.89 V |
| 安装类型 | — | Surface Mount |
| 工作温度 | — | -40C to +85C (industrial) |
| I/O Standards | — | LVTTL, LVCMOS, PCI, GTL, SSTL-2/3, HSTL, LVDS, LVPECL |
| Number of PLLs | — | 4 |
| Lead Free | — | Yes |
| Number of Logic Array Blocks | — | 1,520 (40 LABs per MegaLAB) |