EP20K60EFC324-2N vs EP20K100FC324-1V Vergleich
Detaillierter Direktvergleich von EP20K60EFC324-2N von Altera und EP20K100FC324-1V von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K60EFC324-2N | EP20K100FC324-1V |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $52,73 | $118,40 |
| Series | APEX-20KE | APEX-20K® |
| Family | APEX 20K | — |
| Number of Logic Elements/Cells | 2,560 | — |
| Total System Gates | 60,000 | — |
| Number of Logic Array Blocks (LABs/CLBs) | 2,560 | — |
| Total RAM Bits | 32,768 | 53248 |
| Number of I/O | 196 | 252 |
| Core Voltage Supply | 1.71 V to 1.89 V (1.8 V typ.) | — |
| Internal Frequency (max) | 200 MHz | — |
| Propagation Delay | 1.72 ns | — |
| Operating Temperature Range (TJ) | 0 °C to 85 °C (commercial) | — |
| Gehäuse / Bauform | 324-BGA (FineLine BGA, 19x19 mm) | 324-FBGA (FineLine BGA, 19x19 mm) |
| Supplier Device Package | 324-FBGA (19x19) | 324-FBGA |
| Montageart | Surface Mount | Surface Mount |
| Process Technology | 0.22 µm CMOS | — |
| Architecture | MultiCore (LUT + ESB memory + product-term) | MultiCore (LUT + product-term + embedded memory) |
| Configuration Method | Passive Serial / JTAG (IEEE 1149.1) | — |
| RoHS-Status | unknown | [DATA_NEEDED: RoHS compliance] |
| Number of Logic Elements / Cells | — | 4160 |
| Number of Gates (typical) | — | 100000 |
| Number of LABs/CLBs | — | [DATA_NEEDED: number of Logic Array Blocks] |
| Number of EABs | — | [DATA_NEEDED: number of Embedded Array Blocks] |
| Supply Voltage - Core (VCCINT) | — | 2.375 V to 2.625 V |
| Supply Voltage - I/O (VCCIO) | — | 3.0 V / 3.3 V / 5.0 V tolerant (per I/O standard) |
| Speed Grade | — | -1V (commercial) |
| Betriebstemperatur | — | 0C to +85C (commercial) |
| Number of PLLs | — | 4 |
| I/O Standards Supported | — | LVCMOS, LVTTL, PCI, SSTL, GTL+, HSTL |
| Programming Interface | — | JTAG (IEEE 1149.1) / in-system |