EP20K60EFC324-2N vs EP20K100FC324-1V 对比

详细并排对比 EP20K60EFC324-2N 出自 Altera 和 EP20K100FC324-1V 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K60EFC324-2N EP20K100FC324-1V
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $52.73 $118.40
Series APEX-20KE APEX-20K®
Family APEX 20K —
Number of Logic Elements/Cells 2,560 —
Total System Gates 60,000 —
Number of Logic Array Blocks (LABs/CLBs) 2,560 —
Total RAM Bits 32,768 53248
Number of I/O 196 252
Core Voltage Supply 1.71 V to 1.89 V (1.8 V typ.) —
Internal Frequency (max) 200 MHz —
Propagation Delay 1.72 ns —
Operating Temperature Range (TJ) 0 °C to 85 °C (commercial) —
封装 / 外壳 324-BGA (FineLine BGA, 19x19 mm) 324-FBGA (FineLine BGA, 19x19 mm)
Supplier Device Package 324-FBGA (19x19) 324-FBGA
安装类型 Surface Mount Surface Mount
Process Technology 0.22 µm CMOS —
Architecture MultiCore (LUT + ESB memory + product-term) MultiCore (LUT + product-term + embedded memory)
Configuration Method Passive Serial / JTAG (IEEE 1149.1) —
RoHS 状态 unknown [DATA_NEEDED: RoHS compliance]
Number of Logic Elements / Cells — 4160
Number of Gates (typical) — 100000
Number of LABs/CLBs — [DATA_NEEDED: number of Logic Array Blocks]
Number of EABs — [DATA_NEEDED: number of Embedded Array Blocks]
Supply Voltage - Core (VCCINT) — 2.375 V to 2.625 V
Supply Voltage - I/O (VCCIO) — 3.0 V / 3.3 V / 5.0 V tolerant (per I/O standard)
Speed Grade — -1V (commercial)
工作温度 — 0C to +85C (commercial)
Number of PLLs — 4
I/O Standards Supported — LVCMOS, LVTTL, PCI, SSTL, GTL+, HSTL
Programming Interface — JTAG (IEEE 1149.1) / in-system

数据手册与资源

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