EP20K60ETC144-1X vs EP20K60ETC144-3 Vergleich
Detaillierter Direktvergleich von EP20K60ETC144-1X von Intel und EP20K60ETC144-3 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP20K60ETC144-1X - 60K-Gate APEX-20KE FPGA, 144-LQFP | Intel/Altera
EP20K60ETC144-1X ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP20K60ETC144-1X | EP20K60ETC144-3 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $152,00 | $26,80 |
| Series | APEX-20KE | APEX 20KE |
| Logic Elements / Cells | 2,560 | — |
| Total Gates | 60,000 | — |
| Total RAM Bits | 32,768 | — |
| Number of I/O | 92 | — |
| Number of Logic Elements/Cells | 2,560 | — |
| Core Voltage | 1.8 V (1.71 V to 1.89 V) | — |
| Propagation Delay | 1.72 ns | 1.72 ns |
| Internal Frequency (Max) | 160 MHz | — |
| Betriebstemperatur | 0 C to +85 C | 0 °C to 85 °C (TJ) |
| Process Technology | 0.22 um CMOS | 0.22 µm CMOS |
| Gehäuse / Bauform | 144-LQFP | — |
| Supplier Device Package | 144-TQFP (20x20 mm) | — |
| Montageart | Surface Mount | Surface Mount |
| Terminal Pitch | 0.5 mm | — |
| Lead Finish / Terminal Form | Gull Wing (LQFP) | — |
| Logic Family | CMOS | — |
| Architecture | MultiCore (SOPC) | — |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Manufacturer | — | Intel (formerly Altera) |
| Logic Elements | — | 2,560 |
| Embedded Memory (RAM bits) | — | 32,768 |
| Maximum User I/O Pins (device) | — | 196 |
| User I/O Pins (this package) | — | 92 |
| Gehäuse | — | 144-LQFP (20x20 mm) |
| Core Voltage (VCCINT) | — | 1.71 V to 1.89 V |
| Maximum Internal Frequency | — | 160 MHz to 182 MHz |
| Speed Grade | — | -3 |
| Programmable I/O Standards | — | LVTTL, LVCMOS, PCI, SSTL-2/3, LVDS |
| Configuration Interface | — | JTAG (IEEE 1149.1) |
| Total Package Pins | — | 144 |