EP20K60ETC144-1X vs EP20K60ETC144-3 Comparaison
Comparaison détaillée côte à côte de EP20K60ETC144-1X par Intel et EP20K60ETC144-3 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP20K60ETC144-1X - 60K-Gate APEX-20KE FPGA, 144-LQFP | Intel/Altera
EP20K60ETC144-1X ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP20K60ETC144-1X | EP20K60ETC144-3 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $152,00 | $26,80 |
| Series | APEX-20KE | APEX 20KE |
| Logic Elements / Cells | 2,560 | — |
| Total Gates | 60,000 | — |
| Total RAM Bits | 32,768 | — |
| Number of I/O | 92 | — |
| Number of Logic Elements/Cells | 2,560 | — |
| Core Voltage | 1.8 V (1.71 V to 1.89 V) | — |
| Propagation Delay | 1.72 ns | 1.72 ns |
| Internal Frequency (Max) | 160 MHz | — |
| Température de fonctionnement | 0 C to +85 C | 0 °C to 85 °C (TJ) |
| Process Technology | 0.22 um CMOS | 0.22 µm CMOS |
| Boîtier / Format | 144-LQFP | — |
| Supplier Device Package | 144-TQFP (20x20 mm) | — |
| Type de montage | Surface Mount | Surface Mount |
| Terminal Pitch | 0.5 mm | — |
| Lead Finish / Terminal Form | Gull Wing (LQFP) | — |
| Logic Family | CMOS | — |
| Architecture | MultiCore (SOPC) | — |
| Niveau MSL | [DATA_NEEDED: MSL level] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Manufacturer | — | Intel (formerly Altera) |
| Logic Elements | — | 2,560 |
| Embedded Memory (RAM bits) | — | 32,768 |
| Maximum User I/O Pins (device) | — | 196 |
| User I/O Pins (this package) | — | 92 |
| Boîtier | — | 144-LQFP (20x20 mm) |
| Core Voltage (VCCINT) | — | 1.71 V to 1.89 V |
| Maximum Internal Frequency | — | 160 MHz to 182 MHz |
| Speed Grade | — | -3 |
| Programmable I/O Standards | — | LVTTL, LVCMOS, PCI, SSTL-2/3, LVDS |
| Configuration Interface | — | JTAG (IEEE 1149.1) |
| Total Package Pins | — | 144 |