EP20K60ETC144-3N vs EP20K60EFC144-2XN Vergleich
Detaillierter Direktvergleich von EP20K60ETC144-3N von Intel und EP20K60EFC144-2XN von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP20K60ETC144-3N - APEX-20KE FPGA 60K Gates 2560 Logic Elements 144-LQFP | Intel
EP20K60ETC144-3N ObsoleteAltera
EP20K60EFC144-2XN - APEX-20KE FPGA 60K Gates 93 I/O 144-BGA | Intel/Altera
EP20K60EFC144-2XN NrndSpezifikationsvergleich
| Parameter | EP20K60ETC144-3N | EP20K60EFC144-2XN |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $92,00 | $152,00 |
| Family | APEX-20KE | APEX-20K (MultiCore Architecture) |
| Typical Gate Count | 60,000 gates | 60,000 gates |
| Logic Elements / Cells | 2,560 | — |
| Embedded Memory (ESB) | 32,768 bits | — |
| Maximum User I/O | 92 | 93 |
| Core Supply Voltage (VCCINT) | 1.8 V | 1.71 V to 1.89 V |
| Internal Frequency | 160 MHz to 182 MHz | — |
| Propagation Delay | 1.72 ns | — |
| Process Technology | 0.22 µm CMOS | — |
| Operating Temperature (Commercial) | 0 °C to +85 °C | — |
| Gehäuse | 144-LQFP (LFQFP, gull-wing, square body) | — |
| Montageart | Surface Mount | Surface Mount |
| Logic Family | CMOS | CMOS, SRAM-based LUT |
| Programming Interface | IEEE 1149.1 JTAG (in-system programmable) | — |
| RoHS-Status | unknown | [DATA_NEEDED: RoHS status] |
| Series | — | APEX-20KE |
| Logic Elements / Embedded Array Blocks | — | 2,560 |
| Embedded Memory (Bits) | — | 32,768 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| I/O Supply Voltage (VCCIO) | — | [DATA_NEEDED: VCCIO range] |
| Package Type | — | 144-BGA (Fine-pitch Ball Grid Array) |
| Package Code (per MPN suffix) | — | FBGA / LBGA, 13x13 mm |
| Operating Temperature (TJ) | — | 0 C to +85 C (commercial) |
| Speed Grade | — | -2 (per MPN suffix) |
| Configuration Method | — | JTAG (IEEE 1149.1), Passive Serial, Parallel |