EP2A15B724C7 vs EP2A40B724C7 Vergleich
Detaillierter Direktvergleich von EP2A15B724C7 von Altera und EP2A40B724C7 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A15B724C7 | EP2A40B724C7 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $125,00 | $650,00 |
| Family | APEX II | APEX II |
| Manufacturer | Altera (acquired by Intel) | — |
| System Gates | 600,000 | — |
| Logic Elements / Cells | 16,640 | 38,400 |
| Total RAM Bits | 425,984 | — |
| Number of I/O | 492 | — |
| Core Voltage | 1.425 V to 1.575 V | — |
| Betriebstemperatur | 0 C to 85 C (TJ) | 0 °C to +85 °C (commercial) |
| Gehäuse | 724-BBGA, FCBGA (35 mm x 35 mm) | 724-ball FCBGA (FineLine BGA), 35 mm x 35 mm |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| Speed Grade | C7 (per part suffix) | — |
| Maximum Internal Frequency | 500 MHz | 562 MHz |
| Process Technology | 0.15 um all-layer copper | 0.15 µm CMOS, up to 8 metal layers, all-layer copper |
| LVDS Support | True-LVDS up to 1 Gbps | — |
| Interface Standards | True-LVDS, LVPECL, PCML, HyperTransport | — |
| Configuration Modes | Passive Serial, Passive Parallel, JTAG | — |
| RoHS-Status | unknown | Non-compliant (lead-bearing FCBGA) |
| Total System Gates | — | 1,500,000 |
| Embedded RAM Bits | — | 655,360 |
| Maximum User I/O | — | 540 |
| Core Supply Voltage | — | 1.425 V to 1.575 V (typ. 1.5 V) |
| PLLs | — | 4 |
| I/O Standards Supported | — | LVTTL, LVCMOS, 1.5 V/1.8 V/2.5 V/3.3 V, SSTL, HSTL, PCI, LVDS, LVPECL, PCML, HyperTransport, True-LVDS (1 Gbps) |
| Configuration Method | — | JTAG (IEEE 1149.1), Passive Serial, Passive Parallel, Active Serial via EPC configuration devices |
| MultiVolt I/O Support | — | 1.5 V, 1.8 V, 2.5 V, 3.3 V |
| DDR Memory Support | — | Yes (via ESB / I/O circuitry) |
| MSL-Level | — | [DATA_NEEDED: MSL level] |