EP2A15F672I8 vs EP2A25F724 Vergleich
Detaillierter Direktvergleich von EP2A15F672I8 von Altera und EP2A25F724 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP2A15F672I8 - APEX II 600K Gate FPGA, 672-FBGA | Altera
EP2A15F672I8 ⚠ Letzte Bestellmöglichkeit
Spezifikationsvergleich
| Parameter | EP2A15F672I8 | EP2A25F724 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | Memory ICs |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $680,00 | $112,00 |
| Family | APEX II | — |
| Process Technology | 0.15 µm all-layer copper CMOS | — |
| Metal Layers | Up to 8 | — |
| Typical Gates | 600 K | — |
| Logic Elements / Cells | 16,640 | — |
| User I/Os | 492 | — |
| Embedded Memory | 416 Kbits | — |
| Maximum Internal Frequency | 435 MHz | — |
| Propagation Delay (typ.) | 1.94 ns | — |
| Core Supply Voltage | 1.5 V (1.425 V – 1.575 V) | — |
| Supply Voltage Range | 1.425 V to 1.575 V | — |
| Betriebstemperatur | -40 °C to +100 °C (TJ, industrial) | [DATA_NEEDED: operating temperature grade] |
| Gehäuse | 672-FBGA, FCBGA, 27 x 27 mm, 1.0 mm pitch | 724-ball FineLine BGA |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| I/O Standards | LVTTL, LVCMOS, LVDS, MultiVolt I/O | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Compliant |
| Device Type | — | Enhanced Configuration Device (EPC) |
| Target FPGA Family | — | Altera APEX II (EP2A-series) |
| Memory Technology | — | Flash (non-volatile, no battery required) |
| Configuration Modes | — | Passive Serial, Passive Parallel Async, Passive Parallel Sync |
| JTAG Support | — | IEEE Std. 1149.1 (boundary-scan / ISP) |
| Multi-Device Configuration | — | Yes - supports daisy-chained APEX II FPGAs |
| In-System Programmability | — | Yes (via JTAG) |
| Versorgungsspannung | — | [DATA_NEEDED: VCC nominal] |
| On-chip Oscillator | — | Yes (internal configuration clock) |
| User Flash Region | — | Yes (separate from configuration data) |
| Lebenszyklusstatus | — | Not Recommended for New Designs (NRND) - Altera acquired by Intel 2015 |