EP2A15F672I8 vs EP2A25F724 对比

详细并排对比 EP2A15F672I8 出自 Altera 和 EP2A25F724 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP2A15F672I8 EP2A15F672I8 - APEX II 600K Gate FPGA, 672-FBGA | Altera

EP2A15F672I8 - APEX II 600K Gate FPGA, 672-FBGA | Altera

EP2A15F672I8 ⚠ 最后一次采购

规格对比

参数 EP2A15F672I8 EP2A25F724
品牌 Altera Altera
分类 FPGA & CPLD Memory ICs
生命周期状态 最后采购期 不推荐新设计
库存状态 有库存 有库存
单价(USD) $680.00 $112.00
Family APEX II —
Process Technology 0.15 µm all-layer copper CMOS —
Metal Layers Up to 8 —
Typical Gates 600 K —
Logic Elements / Cells 16,640 —
User I/Os 492 —
Embedded Memory 416 Kbits —
Maximum Internal Frequency 435 MHz —
Propagation Delay (typ.) 1.94 ns —
Core Supply Voltage 1.5 V (1.425 V – 1.575 V) —
Supply Voltage Range 1.425 V to 1.575 V —
工作温度 -40 °C to +100 °C (TJ, industrial) [DATA_NEEDED: operating temperature grade]
封装 672-FBGA, FCBGA, 27 x 27 mm, 1.0 mm pitch 724-ball FineLine BGA
安装类型 Surface Mount (BGA) Surface Mount (BGA)
I/O Standards LVTTL, LVCMOS, LVDS, MultiVolt I/O —
RoHS 状态 [DATA_NEEDED: RoHS status] Compliant
Device Type — Enhanced Configuration Device (EPC)
Target FPGA Family — Altera APEX II (EP2A-series)
Memory Technology — Flash (non-volatile, no battery required)
Configuration Modes — Passive Serial, Passive Parallel Async, Passive Parallel Sync
JTAG Support — IEEE Std. 1149.1 (boundary-scan / ISP)
Multi-Device Configuration — Yes - supports daisy-chained APEX II FPGAs
In-System Programmability — Yes (via JTAG)
电源电压 — [DATA_NEEDED: VCC nominal]
On-chip Oscillator — Yes (internal configuration clock)
User Flash Region — Yes (separate from configuration data)
生命周期状态 — Not Recommended for New Designs (NRND) - Altera acquired by Intel 2015

数据手册与资源

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