EP2A25B724C7 vs EP2A25F672C7N Vergleich
Detaillierter Direktvergleich von EP2A25B724C7 von Altera und EP2A25F672C7N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A25B724C7 | EP2A25F672C7N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $760,00 | $195,00 |
| Family | APEX II | APEX II |
| Logic Elements | 24,320 | 24,320 cells |
| System Gates | 900,000 | Approximately 900,000 |
| Maximum User I/O | 540 | — |
| Internal Frequency | 500 MHz | — |
| Speed Grade | -7 | — |
| Process Technology | 0.15 µm CMOS | 0.15 µm all-layer copper (up to 8 metal layers) |
| Core Supply Voltage | 1.425 V to 1.575 V (1.5 V nominal) | — |
| Gehäuse | 724-BBGA / FCBGA (35 mm × 35 mm) | — |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0 °C to +85 °C (commercial) | 0 °C to 85 °C (commercial) |
| Embedded System Blocks (ESB) | Yes (dual-port RAM/ROM) | — |
| PLLs | 8 | Up to 4 |
| Multipliers | Yes (dedicated DSP blocks) | — |
| Configuration Interface | JTAG (IEEE 1149.1) | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| User I/Os | — | 492 |
| Propagation Delay (tPD) | — | 1.69 ns |
| Internal Operating Frequency | — | Up to 500 MHz |
| Core Voltage (VCCINT) | — | 1.5 V |
| Logic Family | — | CMOS |
| Package Type | — | 672-ball FC-FBGA (FineLine BGA) |
| Package Body Size | — | 27 x 27 mm |
| Ball Pitch | — | 1.0 mm |
| High-Speed I/O Support | — | True-LVDS, LVPECL, PCML, HyperTransport up to 1 Gbps |
| Programmable Logic Type | — | Loadable PLD (in-system programmable) |
| Embedded Memory | — | Embedded System Blocks (ESB) configurable as dual-port RAM/ROM |