EP2A25B724C7 vs EP2A25F672C7N Comparación
Comparación detallada lado a lado de EP2A25B724C7 por Altera y EP2A25F672C7N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP2A25B724C7 | EP2A25F672C7N |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $760,00 | $195,00 |
| Family | APEX II | APEX II |
| Logic Elements | 24,320 | 24,320 cells |
| System Gates | 900,000 | Approximately 900,000 |
| Maximum User I/O | 540 | — |
| Internal Frequency | 500 MHz | — |
| Speed Grade | -7 | — |
| Process Technology | 0.15 µm CMOS | 0.15 µm all-layer copper (up to 8 metal layers) |
| Core Supply Voltage | 1.425 V to 1.575 V (1.5 V nominal) | — |
| Encapsulado | 724-BBGA / FCBGA (35 mm × 35 mm) | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | 0 °C to +85 °C (commercial) | 0 °C to 85 °C (commercial) |
| Embedded System Blocks (ESB) | Yes (dual-port RAM/ROM) | — |
| PLLs | 8 | Up to 4 |
| Multipliers | Yes (dedicated DSP blocks) | — |
| Configuration Interface | JTAG (IEEE 1149.1) | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| User I/Os | — | 492 |
| Propagation Delay (tPD) | — | 1.69 ns |
| Internal Operating Frequency | — | Up to 500 MHz |
| Core Voltage (VCCINT) | — | 1.5 V |
| Logic Family | — | CMOS |
| Package Type | — | 672-ball FC-FBGA (FineLine BGA) |
| Package Body Size | — | 27 x 27 mm |
| Ball Pitch | — | 1.0 mm |
| High-Speed I/O Support | — | True-LVDS, LVPECL, PCML, HyperTransport up to 1 Gbps |
| Programmable Logic Type | — | Loadable PLD (in-system programmable) |
| Embedded Memory | — | Embedded System Blocks (ESB) configurable as dual-port RAM/ROM |