EP2A25F672C9 vs EP2A25F672C8N Vergleich
Detaillierter Direktvergleich von EP2A25F672C9 von Altera und EP2A25F672C8N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A25F672C9 | EP2A25F672C8N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $700,00 | $205,00 |
| Family | APEX II | APEX II |
| Logic Elements (LE) | Approximately 25,000 | — |
| Macro Cells | 2432 | — |
| User I/O | 492 | — |
| Gehäuse | 672-ball FCBGA (FineLine BGA) | 672-ball FC-FBGA (FineLine BGA) |
| Package Dimensions | 27 mm x 27 mm | — |
| Ball Pitch | 1.0 mm | 1.0 mm |
| Process Technology | 0.15 µm all-layer copper, up to 8 metal layers | — |
| Logic Family | CMOS | — |
| Propagation Delay | 1.69 ns | 1.69 ns |
| Betriebstemperatur | 0°C to 85°C (Commercial) | 0 C to 85 C (commercial) |
| Versorgungsspannung | [DATA_NEEDED: core VCC voltage] | — |
| I/O Standards | LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL (multi-voltage 1.5/1.8/2.5/3.3 V) | — |
| Configuration | Passive Serial, Passive Parallel Synchronous, JTAG | — |
| Embedded Memory | ESBs for dual-port RAM, ROM, FIFO | — |
| Montageart | Surface Mount | Surface Mount |
| RoHS-Status | [DATA_NEEDED] | Compliant |
| Technology Node | — | 0.15 um all-layer copper process |
| System Gates | — | 900,000 |
| Logic Elements / Cells | — | 24,320 |
| Maximum Internal Frequency | — | 333 MHz |
| User I/Os | — | 492 |
| Package Body Size | — | 27 x 27 mm |
| Core Supply Voltage | — | 1.5 V |
| Speed Grade | — | C8 |
| Multi-Gigabit Transceiver Rate | — | Up to 1 Gbps per channel |
| Lead-Free Suffix | — | N (lead-free, Pb-free finish) |