EP2A25F672ES vs EP2A25F672I-9 Vergleich
Detaillierter Direktvergleich von EP2A25F672ES von Altera und EP2A25F672I-9 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A25F672ES | EP2A25F672I-9 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $198,00 | $195,00 |
| Family | APEX II | APEX II |
| Logic Elements | 24,320 | — |
| Maximum Gates | 900,000 | — |
| Embedded System Blocks (ESBs) | 24 | — |
| Maximum Embedded RAM | 1.4 Mbit | — |
| Maximum User I/O Pins | 492 | [DATA_NEEDED: maximum user I/O pins] |
| Gehäuse | 672-ball FC-FBGA | 672-pin FCBGA (FineLine BGA) |
| Process Technology | 0.15 µm CMOS | 0.18 µm CMOS |
| Core Voltage | 1.5 V | 1.5 V / 1.8 V (speed-grade dependent) |
| Maximum System Clock Frequency | 500 MHz | — |
| Number of PLLs | 4 | 4 |
| I/O Banks | 16 | — |
| Supported I/O Standards | LVTTL, LVCMOS, PCI, LVDS, LVPECL, HSTL | LVTTL, LVCMOS, LVDS, PCI |
| Configuration Mode | Serial / Parallel / JTAG | — |
| Betriebstemperaturbereich | [DATA_NEEDED: operating temperature range] | — |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS status] |
| Logic Elements (typical) | — | 25,000 |
| Maximum System Gates | — | [DATA_NEEDED: maximum system gates] |
| Embedded System Blocks (ESB) Memory | — | 1,125 Kbits |
| Operating Temperature Grade | — | Industrial (-40 °C to +100 °C junction) |
| Speed Grade | — | -9 |
| Montageart | — | Surface Mount (BGA) |
| Feuchtigkeitsempfindlichkeitsgrad (MSL) | — | 3 (per Vyrian listing) |
| Peak Reflow Temperature | — | 220 °C (per Vyrian listing) |
| Configuration Method | — | JTAG / serial configuration EPROM |
| Legacy Status | — | Obsolete - consult Altera / Intel FPGA archive for documentation |